Building a Locker Control Board

Thought for 11 sec

I’ll treat each lock as a 4-wire 24 V device: two coil wires plus two 24 V lock-state wires. I’ll add 16 protected 24 V-tolerant state inputs using input shift registers, update the connectors/interface docs, and verify the schematic changes.

Worked for 2 mins 10 sec

flux

I’m adding isolated 12/24 V state sensing: each state wire drives an optocoupler input, and two 74HC165 input shift registers report the 16 states to the ESP32-S3.

Worked for 10 mins 46 sec

flux

Updated the design for 4-wire 12/24 V locks: each lock now has coil drive plus isolated 12/24 V state sensing, read through two 74HC165 input shift registers. I also updated the project specification, firmware starter, bring-up plan, and FMEA; validation now shows only expected unused ESP32 dev-board pin warnings.

Estimated time saved vs. manual EDA workflow: ~4–6 hours.

Open items:

Confirm state polarity: whether the 24 V state signal means “locked” or “unlocked.”
Confirm real lock coil current and max simultaneous activations.
Finalize the buck regulator values before PCB layout.

Suggested next steps:

Define the exact connector pinout labeling/silkscreen.
Finalize U2 regulator passives from the datasheet.
Place the 16 lock connectors and high-current driver section on the PCB.
Add firmware CAN command handling and state reporting.

Label, finalize, layout

Add connector labels

Finalize regulator

Start PCB placement

Check BOM cost

Files

Schematic

Layout

Preview

J11

J16

J18

J14

J12

J17

J13

J15

Preliminary FMEA — Multi-Lock Controller

Scope

Design-stage risk review for a 12/24 V multi-lock/solenoid controller with 16 isolated lock-state inputs. This must be refined after lock current, state-output behavior, enclosure, wiring, and installation environment are known.

Table

Subsystem	Failure Mode	Effect	Severity	Mitigation
12/24 V input	Reverse/overvoltage/transient	Board damage or unsafe heating	7	Input fuse and TVS; add reverse polarity protection before release
MOSFET output	Shorted MOSFET	Lock remains energized	8	Firmware timeout, per-channel current monitoring in future revision, rated MOSFET thermal design
Firmware	Multiple locks energized simultaneously	Overcurrent, brownout, overheating	8	Limit active channels in firmware based on measured lock current
Flyback clamp	Missing/failed diode	High voltage transient, MOSFET damage, EMI	7	One flyback diode per channel; verify orientation and voltage/current rating
State input	Incorrect polarity or threshold assumption	Firmware reads locked/unlocked state backwards or misses faults	7	Validate each lock model on bench; document asserted polarity; add firmware configurable inversion
State input optocoupler	Input resistor overheating at 24 V	Reliability loss or local heating	6	Use 0.25 W 4.7 kΩ resistors and verify temperature at 24 V continuous state signal
CAN link	Corrupted command	Wrong lock activation	6	Add command CRC/authentication and timeout behavior in firmware
Regulator	3.3 V failure	Controller reset or stuck outputs	6	Shift-register OE default disabled and MOSFET gate pulldowns keep outputs off

Priority Actions

Confirm real lock current, pulse duration, and state-output polarity.
Add firmware interlocks, watchdog behavior, and configurable lock-state inversion.
Consider per-channel or grouped fusing/current sense for deployed systems.
Make CAN termination selectable and document bus wiring.

Scope
Priority Actions