I’ll treat each lock as a 4-wire 24 V device: two coil wires plus two 24 V lock-state wires. I’ll add 16 protected 24 V-tolerant state inputs using input shift registers, update the connectors/interface docs, and verify the schematic changes.
I’m adding isolated 12/24 V state sensing: each state wire drives an optocoupler input, and two 74HC165 input shift registers report the 16 states to the ESP32-S3.
Updated the design for 4-wire 12/24 V locks: each lock now has coil drive plus isolated 12/24 V state sensing, read through two 74HC165 input shift registers. I also updated the project specification, firmware starter, bring-up plan, and FMEA; validation now shows only expected unused ESP32 dev-board pin warnings.
Estimated time saved vs. manual EDA workflow: ~4–6 hours.
Open items:
Confirm state polarity: whether the 24 V state signal means “locked” or “unlocked.”
Confirm real lock coil current and max simultaneous activations.
Finalize the buck regulator values before PCB layout.
Suggested next steps:
Define the exact connector pinout labeling/silkscreen.
Finalize U2 regulator passives from the datasheet.
Place the 16 lock connectors and high-current driver section on the PCB.
Add firmware CAN command handling and state reporting.
Use a current-limited 12/24 V bench supply, multimeter, oscilloscope, USB cable for ESP32-S3 programming, and dummy loads or real locks with known current rating.
1. Visual Inspection
Check polarity of D2-D18, F1, U2, U5, all MOSFETs Q1-Q16, all optocouplers ISO1/Q17-Q31, and all 4-wire lock terminal blocks before power-up.
2. Power Checks
Table
Rail
Source
Expected
Current Limit
Pass Criteria
VIN_RAW
J1 before F1
12/24 V
100 mA initial
No short to GND
24V / LOCK_SUPPLY
F1 output
12/24 V
100 mA initial
TVS not heating, no overcurrent
3V3
U2/L2/C16
3.3 V
100 mA initial
3.2-3.4 V and stable
3. Connector Pinout Check
Each lock connector is intended as:
+12/24 V coil supply
Switched coil return
12/24 V state+
State-
Verify all 16 connectors with continuity before connecting locks.
4. Logic Bring-Up
Program the ESP32-S3 over USB.
Confirm serial message reports DIP configuration and raw lock-state word.
Apply a current-limited 12 V test signal to each state input pair and verify the corresponding raw bit changes.
Repeat with 24 V after confirming optocoupler input resistor temperature is acceptable.
Press TEST; verify shift-register outputs toggle one at a time.
With no locks attached, verify each MOSFET drain switches low only for its commanded channel.
5. Lock Output Validation
Start with one dummy load/current-limited lock on channel 1. Confirm flyback behavior and MOSFET temperature, then repeat for all 16 channels.
6. CAN Validation
Check CANH/CANL continuity at J10. Only populate/use the 120 ohm termination if this board is at the end of the bus.
Open Items Before Manufacturing
Finalize U2 regulator datasheet passives and feedback values.
Define maximum lock current and simultaneous activation limit.
Confirm lock-state polarity and whether asserted means locked or unlocked.
Validate thermal rise of Q1-Q16, R49/R1-R58 state input resistors, and fuse sizing with real locks.