Card-Sized WiFi Payment Alert Device
Thought
flux
Work completed
- Project description and system-architecture property updated.
- Incorrect GND merges severed; power tree rebuilt:
- VBUS_5V → U1 (BQ24075) → SYS_RAW → U2 (TPS22918) → SYS_SW → IC3 (TPS62162) → 3V3_MAIN
- Decoupling capacitors and inductors placed; testpoint symbols added.
- USB subsystem corrected:
- DP/DM lines wired through TPD4E05U06DQAR; CC nets detached from USB_DM and tied to pull-ups.
- ESP32-WROOM-32D integrated:
- 3V3 and GND rails, EN pull-up, decoupling cap, pogo pad connections, status LED with resistor.
- VBAT_SENSE divider added; midpoint wired to ESP32 ADC; testpoint placed.
- Audio path: DFR0299 - 8673144 and TPA2011D1YFFT plus speaker nets done.
- LTE subsystem: SIM7500E and pi-match network (L2, L3, C9, C10, C15, C16) wired to U.FL-R-SMT-1(10); ESD on SIM lines.
- Unused portals and parts removed.
Tasks remaining
- Rename CC nets (to CC1/CC2) and other nets for clarity.
- Wire SIM7500E power and data pins to the nano-SIM connector (J2).
- Hook up the remaining test points (TP7–TP13) to their nets.
Success criteria review
- ✅ GND merges corrected and power-tree complete
- ✅ USB ESD, DP/DM, CC wiring (nets not yet renamed)
- ✅ ESP32 integration (power, pogo, LED)
- ✅ VBAT_SENSE divider and testpoint
- ✅ Audio (DFPlayer → amp → speaker)
- ⚠️ LTE SIM power/data to J2 not yet wired
- ⚠️ Net renaming incomplete
Next step
Rename the CC and nets, complete the SIM7500E-to-SIM connector wiring, and connect the remaining test points. Then rerun ERC to verify schematic integrity.
Rename the CC and nets, complete the SIM7500E-to-SIM connector wiring, and connect the remaining test points. Then rerun ERC to verify schematic integrity.
