Replacing Vector Robot Brain Board


Worked for 46 sec
Thought for 25 sec — any "No Connect" pins as well. I should probably run the .
Thought for 12 sec
5/6 Run ERC/DRC checks

Inspect current schematic nets around J1, U1, U2, and headers

Rewire schematic as listen-only 4-wire Vector tap

Update component roles/notes for beginner-safe use

Re-place/re-route passive wiretap PCB

Run ERC/DRC checks

Summarize what changed and remaining risks

Thought for 13 sec
Completed 10 design checks — found 4 issues.
Getting a schematic overview.
Getting a layout overview.
there are 2 wires (one red and one black) that go into the part thats attached to the board.. on each side.
Created a project doc

Passive Wiretap Board Status

View Document

This board has been redesigned as a safe listen-only wiretap for the Vector head/body 4-wire cable. It no longer includes the ESP32-C3 or ac...
Done — I redesigned it as a passive listen-only wiretap.
What changed:
  • Removed ESP32-C3 and level-shifter from the signal path.
  • Kept only headers + protection resistors.
  • Mapped the confirmed Vector wires:
    • black GND
    • red VMAIN
    • white BODY_RX
    • green TX1.8
  • Routed the simplified PCB.
  • Ran ERC/DRC checks: no errors/warnings came back in the checked categories.
Saved status here:
Passive Wiretap Board Status
Open item:
  • This is still a hand-wired/probe board, not the final drop-in Vector connector board.
Document, BOM, export
Create wiring guide
Check BOM cost
Export files
Review manufacturability

J2
R2
Resistance
10kΩ
R1
Resistance
10kΩ
R3
Resistance
100kΩ
J1
Vector Reverse-Engineering Interposer — Pin Map and Build Notes
What was built in the schematic
This project now contains the first safe hardware stage: a reverse-engineering/debug interposer board, not the final replacement brain board.
It includes:
  • ESP32-C3-WROOM-02-N4 helper MCU
  • 3.3 V debug supply block
  • TXB0104D 4-channel 2.8 V ↔ 3.3 V level translator
  • 24-pin generic Vector breakout header placeholder
  • 6-pin external debug header
  • Series resistors on monitored Vector signals
  • Probe points for key rails and bus signals
Important limitation
The Vector physical connector is still unknown. J1 is a generic placeholder header until the real head/body connector pitch, pin count, and orientation are measured.
J1 placeholder pin map

Table


J1 pinNetPurpose
1GNDGround reference
2GNDGround reference
3VECTOR_2V8_REFVector 2.8 V logic reference for level shifter VCCA
4VECTOR_BODY_TX_RAWPassive/series-protected probe of body TX
5VECTOR_BODY_RX_RAWPassive/series-protected probe of body RX
6VECTOR_SCL2_RAWI2C/SCL probe candidate
7VECTOR_SDA2_RAWI2C/SDA probe candidate
8VECTOR_VBAT_SENSE_ONLYBattery voltage probe only — do not power board from this yet
9VECTOR_USB_D_PLUS_PROBEUSB D+ probe only
10VECTOR_USB_D_MINUS_PROBEUSB D- probe only
11VECTOR_HEAD_TX_PROBEExtra head TX probe candidate
12VECTOR_HEAD_RX_PROBEExtra head RX probe candidate
13–24NCReserved until real connector is mapped
J2 debug header map

Table


J2 pinNetPurpose
1DBG_5V_INExternal 5 V input for debug board / 3.3 V regulator
2DBG_3V3Regulated 3.3 V output/debug rail
3GNDGround
4ESP_RX_FROM_VECTORESP32 RX / translated Vector TX monitor
5ESP_TX_TO_VECTOR_EN_DISABLED_BY_FWESP32 TX path; firmware must keep TX disabled until protocol is understood
6ESP_SCL2_MONTranslated SCL monitor/debug line
Test points

Table


Test pointNet
TP1GND
TP2VECTOR_2V8_REF
TP3VECTOR_BODY_TX_RAW
TP4VECTOR_BODY_RX_RAW
TP5VECTOR_SCL2_RAW
TP6VECTOR_SDA2_RAW
TP7VECTOR_VBAT_SENSE_ONLY
TP8VECTOR_USB_D_PLUS_PROBE
TP9VECTOR_USB_D_MINUS_PROBE
TP10VECTOR_HEAD_TX_PROBE
TP11VECTOR_HEAD_RX_PROBE
TP12DBG_3V3
Safety rules
  • Do not install this into Vector until J1 is replaced with the exact connector/pinout.
  • Do not drive BODY_RX or any motor/body-control line yet.
  • First firmware must keep ESP32 TX pins as inputs/high-Z.
  • Treat VBAT as sense-only until the battery system is characterized.
  • TXB0104 is acceptable as a first low-speed debug translator, but its suitability for I2C must be verified; TXS/BSS138-style translation may be better for true I2C.
Next build task
Replace the generic J1 placeholder with the actual Vector connector once measured from the head/body board.
  • What was built in the schematic

  • Important limitation

  • J1 placeholder pin map

  • J2 debug header map

  • Test points

  • Safety rules

  • Next build task