Replacing Vector Robot Brain Board
Worked for 1 min 54 sec
Created a project doc
Passive Wiretap Board Status
This board has been redesigned as a safe listen-only wiretap for the Vector head/body 4-wire cable. It no longer includes the ESP32-C3 or ac...
Done — I redesigned it as a passive listen-only wiretap.
What changed:
- Removed ESP32-C3 and level-shifter from the signal path.
- Kept only headers + protection resistors.
- Mapped the confirmed Vector wires:
- black
GND - red
VMAIN - white
BODY_RX - green
TX1.8
- black
- Routed the simplified PCB.
- Ran ERC/DRC checks: no errors/warnings came back in the checked categories.
Saved status here:
Passive Wiretap Board Status
Passive Wiretap Board Status
Open item:
- This is still a hand-wired/probe board, not the final drop-in Vector connector board.
Document, BOM, export
Create wiring guide
Check BOM cost
Export files
Review manufacturability
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Vector Reverse-Engineering Interposer — Pin Map and Build Notes
What was built in the schematic
This project now contains the first safe hardware stage: a reverse-engineering/debug interposer board, not the final replacement brain board.
It includes:
- ESP32-C3-WROOM-02-N4 helper MCU
- 3.3 V debug supply block
- TXB0104D 4-channel 2.8 V ↔ 3.3 V level translator
- 24-pin generic Vector breakout header placeholder
- 6-pin external debug header
- Series resistors on monitored Vector signals
- Probe points for key rails and bus signals
Important limitation
The Vector physical connector is still unknown.
J1 is a generic placeholder header until the real head/body connector pitch, pin count, and orientation are measured.J1 placeholder pin map
Table
| J1 pin | Net | Purpose |
|---|---|---|
| 1 | GND | Ground reference |
| 2 | GND | Ground reference |
| 3 | VECTOR_2V8_REF | Vector 2.8 V logic reference for level shifter VCCA |
| 4 | VECTOR_BODY_TX_RAW | Passive/series-protected probe of body TX |
| 5 | VECTOR_BODY_RX_RAW | Passive/series-protected probe of body RX |
| 6 | VECTOR_SCL2_RAW | I2C/SCL probe candidate |
| 7 | VECTOR_SDA2_RAW | I2C/SDA probe candidate |
| 8 | VECTOR_VBAT_SENSE_ONLY | Battery voltage probe only — do not power board from this yet |
| 9 | VECTOR_USB_D_PLUS_PROBE | USB D+ probe only |
| 10 | VECTOR_USB_D_MINUS_PROBE | USB D- probe only |
| 11 | VECTOR_HEAD_TX_PROBE | Extra head TX probe candidate |
| 12 | VECTOR_HEAD_RX_PROBE | Extra head RX probe candidate |
| 13–24 | NC | Reserved until real connector is mapped |
J2 debug header map
Table
| J2 pin | Net | Purpose |
|---|---|---|
| 1 | DBG_5V_IN | External 5 V input for debug board / 3.3 V regulator |
| 2 | DBG_3V3 | Regulated 3.3 V output/debug rail |
| 3 | GND | Ground |
| 4 | ESP_RX_FROM_VECTOR | ESP32 RX / translated Vector TX monitor |
| 5 | ESP_TX_TO_VECTOR_EN_DISABLED_BY_FW | ESP32 TX path; firmware must keep TX disabled until protocol is understood |
| 6 | ESP_SCL2_MON | Translated SCL monitor/debug line |
Test points
Table
| Test point | Net |
|---|---|
| TP1 | GND |
| TP2 | VECTOR_2V8_REF |
| TP3 | VECTOR_BODY_TX_RAW |
| TP4 | VECTOR_BODY_RX_RAW |
| TP5 | VECTOR_SCL2_RAW |
| TP6 | VECTOR_SDA2_RAW |
| TP7 | VECTOR_VBAT_SENSE_ONLY |
| TP8 | VECTOR_USB_D_PLUS_PROBE |
| TP9 | VECTOR_USB_D_MINUS_PROBE |
| TP10 | VECTOR_HEAD_TX_PROBE |
| TP11 | VECTOR_HEAD_RX_PROBE |
| TP12 | DBG_3V3 |
Safety rules
- Do not install this into Vector until J1 is replaced with the exact connector/pinout.
- Do not drive
BODY_RXor any motor/body-control line yet. - First firmware must keep ESP32 TX pins as inputs/high-Z.
- Treat
VBATas sense-only until the battery system is characterized. - TXB0104 is acceptable as a first low-speed debug translator, but its suitability for I2C must be verified; TXS/BSS138-style translation may be better for true I2C.
Next build task
Replace the generic J1 placeholder with the actual Vector connector once measured from the head/body board.
What was built in the schematic
Important limitation
J1 placeholder pin map
J2 debug header map
Test points
Safety rules
Next build task
