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flux

Yes, Senhor Vasquez — it is possible, but you need two resistors and must break the existing direct FB-to-3.3 V connection. Adding only one resistor will not fix it.
For the adjustable TPS62827:
VOUT=0.6 V(1+RTOPRBOTTOM)V_{OUT}=0.6\text{ V}\left(1+\frac{R_{TOP}}{R_{BOTTOM}}\right)
A suitable 1% resistor pair is:
  • R_TOP = 453 kΩ: output to FB
  • R_BOTTOM = 100 kΩ: FB to GND
This produces approximately:
0.6(1+453/100)=3.318 V0.6(1+453/100)=3.318\text{ V}
That is suitable for a nominal 3.3 V rail.
Required modification 
Text
3.3 V output ── 453 kΩ ──┐
                          ├── TPS62827 FB
GND ────────── 100 kΩ ───┘
Procedure:
  1. Completely disconnect USB and the LiPo.
  2. Locate the PCB trace directly connecting U6 FB pin 3 to the 3.3 V output.
  3. Carefully cut that trace and confirm with a multimeter that FB is no longer shorted to the output.
  4. Solder 453 kΩ between the 3.3 V output and FB.
  5. Solder 100 kΩ between FB and GND.
  6. Keep both resistors and wires extremely close to U6; FB is sensitive to switching noise.
  7. Check for shorts under magnification.
  8. Initially power the board from a current-limited bench supply or USB current limiter, without the battery.
  9. Measure the output before allowing the ESP32-S3 and other loads to run. Expect approximately 3.3 V.
Important cautions
  • U6 is a tiny 1.5 mm VSON package, so soldering directly to FB pin 3 is difficult.
  • If the FB trace cannot be isolated cleanly, replacing the IC with TPS6282533DMQR may be safer.
  • Do not power the board until the modification is complete. With FB directly connected to the output, the adjustable part will attempt to regulate near 0.6 V, not 3.3 V.
  • Use 1% resistors. Avoid long jumper wires around the SW pin and inductor because those carry noisy switching signals.
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Files

Schematic

Layout

3D View

Design Notes
  • Board target: ESP32-S3 module-based handheld Tamagochi with integrated 16MB flash and 8MB PSRAM.
  • Updated architecture: USB-C 5V sink input -> BQ24074 charger/power-path -> protected 1-cell LiPo -> TPS62827 3.3V buck -> ESP32-S3-WROOM-1-N16R8 and peripherals.
  • Current board remains a 160 mm x 100 mm 4-layer layout.
Module migration summary
  • Replaced the bare ESP32-S3 SoC with ESP32-S3-WROOM-1-N16R8.
  • Removed the external flash (U2), external PSRAM (U3), 40MHz crystal (Y1), and the discrete antenna / RF matching network because the WROOM module integrates memory, clocking, RF matching, and antenna.
  • Rewired the handheld nets to the module pinout while preserving the originally requested assignments for GPIO47, GPIO15, and GPIO16.
  • Re-placed the PCB so the module antenna extends past the board edge for RF performance.
Implemented pin map in current schematic
Native USB
  • USB D- -> GPIO19
  • USB D+ -> GPIO20
TFT ST7789
  • TFT_SCLK -> GPIO21
  • TFT_MOSI -> GPIO47
  • TFT_CS -> GPIO45
  • TFT_DC -> GPIO17
  • TFT_RST -> GPIO41
  • TFT_BL -> GPIO42
SD_MMC 1-bit
  • SD_CLK -> GPIO39
  • SD_CMD -> GPIO38
  • SD_D0 -> GPIO40
  • DAT3/CD pull-up footprint retained on socket for optional future use
Matrix keypad
  • Columns -> GPIO11, GPIO12, GPIO13
  • Rows -> GPIO4, GPIO5, GPIO6, GPIO7, GPIO8, GPIO9, GPIO14, GPIO15, GPIO16
5-way buttons
  • UP -> GPIO1
  • DOWN -> GPIO2
  • LEFT -> GPIO3
  • RIGHT -> GPIO10
  • CENTER -> GPIO18
Control / bring-up
  • BOOT -> GPIO0
  • EN / RESET -> EN
  • UART RX -> RXD0
  • UART TX -> TXD0
Power tree changes implemented
Removed legacy stage
  • Removed U4 (AP63203WU-7) and its dedicated switch-node parts L1 and C17.
  • 3V3 is no longer sourced from the old VBUS buck stage.
USB-C front end retained and extended
  • Kept the existing USB-C connector J1, CC pull-downs R3 and R4 (5.1k), and USB data ESD array D1 unchanged.
  • Added D2 (SMF5.0A) from VBUS to GND for dedicated VBUS surge / clamp protection.
  • Added C1 = 10uF and C18 = 100nF on VBUS at the charger input.
Charger / power-path stage
  • Added U5 = BQ24074RGTT.
  • Connected VBUS to U5 IN.
  • Connected U5 OUT to new intermediate rail VSYS.
  • Connected U5 BAT to battery positive net BAT_POS.
  • Tied EN1 high to VBUS, EN2 low to GND, and ~CE low to GND.
  • Left ITERM intentionally open.
  • Added charger support parts:
    • R13 = 1.8k on ISET -> target charge current about 494 mA
    • R14 = 3.1k on ILIM -> about 500 mA input limit in ILIM mode
    • R17 = 10k on TS to GND as the current default bias choice
    • R18 = 18k on TMR
    • C2 = 10uF on BAT
  • Added status pull-ups and test access:
    • R15 = 100k pull-up on ~PGOOD to 3V3
    • R16 = 100k pull-up on ~CHG to 3V3
    • TP13 on ~PGOOD
    • TP12 on ~CHG
Battery connector and protection
  • Added J5 = S2B-PH-SM4-TB(LF)(SN) JST-PH 2-pin SMD battery connector.
  • Chose on-board battery protection so the design does not depend on sourcing a pre-protected LiPo pack.
  • Added protection stage:
    • U7 = DW01A
    • Q1 = FS8205A
    • R19 = 100 ohm between BAT_POS and DW01A VDD
    • R20 = 1k from CSI to GND
    • C25 = 100nF across DW01A local supply
New 3.3V regulator stage
  • Added U6 = TPS62827DMQR.
  • Connected VSYS to U6 VIN and U6 EN.
  • Connected U6 VOUT/FB path through L2 to the existing 3V3 rail.
  • Added buck support parts:
    • L2 = 470nH
    • C14 = 4.7uF on VIN
    • C24 = 100nF on VIN
    • C15 = 22uF on 3V3
    • C22 = 100nF on 3V3
  • U6 PG intentionally unused.
Placement notes
  • The new power block (U5, U6, U7, Q1, J5, D2, and support passives) has been placed near the USB-C / battery-entry side of the board with the charger and buck stages clustered for short current loops.
  • U1 was re-positioned back to the top-right board edge with about 5 mm antenna overhang so the RF keepout is preserved.
  • TP12 and TP13 remain accessible for probing.
Verification status
  • ERC status for the modified power tree is clean for floating pins, missing power pins, and undriven nets.
  • All newly added parts have footprints assigned.
  • PCB routing is still incomplete: the board currently reports 127 airwires, so additional routing work is still required before fabrication.
Remaining follow-up items
  • Route the updated power nets and the remaining board connections to eliminate airwires.
  • If desired later, replace the current TS grounding approach with a proper battery NTC network matched to the final pack choice.
  • Review copper width / thermal spreading around the charger, battery path, and buck converter before manufacturing export.

  • Module migration summary

  • Implemented pin map in current schematic

  • Native USB

  • TFT ST7789

  • SD_MMC 1-bit

  • Matrix keypad

  • 5-way buttons

  • Control / bring-up

  • Power tree changes implemented

  • Removed legacy stage

  • USB-C front end retained and extended

  • Charger / power-path stage

  • Battery connector and protection

  • New 3.3V regulator stage

  • Placement notes

  • Verification status

  • Remaining follow-up items