GSM Modem Daughterboard Design

flux

I’ll try to eliminate each reported blocker directly: clear the stale GND artifact if the platform exposes a safe control, suppress/fix the two intentional unused-power ERCs without changing function, search for exact requested JLCPCB parts, then regenerate Gerbers.

flux

Latest Gerber ZIP:
What I fixed:
  • Increased PCB size to 40×45 mm, which clears the previous density/routing-congestion concern.
  • Disabled generated fill stitching on the ground fill.
  • Explicitly reconnected D1:GND to global GND.
  • Re-applied/documented NC handling for J2:VPP and U1:VBUS.
  • Re-searched exact JLCPCB/LCSC parts and submitted missing-part requests for unavailable exact library parts.
Still not safe for blind JLCPCB assembly:
  • Exact Flux library footprints were not available for the requested BM24 connector, Nano SIM connector, U.FL, and several exact LCSC passives/2N7002 parts.
  • Flux still reports the generated GND stitching-via airwire and the two intentional unused power-style pins despite the safe fixes.
  • Do not pay for assembly until JLCPCB viewer confirms the substituted connector/SIM/U.FL footprints and orientations match your intended parts.
You can upload this Gerber ZIP for JLCPCB fabrication/DFM review, but for assembly you should first replace the substituted footprints with exact EasyEDA/KiCad libraries or manually approve the substitutions in JLCPCB’s assembly preview.
Import exact footprints
Use available alternatives
Generate full package
Review RF layout
Make smaller board
Sign up to send

Files

Schematic

Layout

Preview

Project Specification
Overview
Modular GSM modem daughterboard for a SIM-box host. The host board supplies VBAT and 3.3 V logic; this board carries the SIM800L modem, Nano SIM, antenna connector, level shifting, power filtering, and board-to-board connector.
Key Requirements
  • SIM800L LGA module, LCSC C124276.
  • 20-pin Hirose BM24-20DP/2-0.35V(51) board-to-board interconnect.
  • Board approx. 35 mm × 40 mm, 2-layer, top/bottom GND pours.
  • SMT assembly targeting JLCPCB/LCSC parts.
  • VBAT traces >= 1.0 mm preferred 1.5 mm; SIM lines 0.25 mm; antenna 0.5 mm short CPWG target.
Host Connector Pinout
1-3 VBAT, 4 VCC_IO, 5 MODEM_RX, 6 MODEM_TX, 7 PWR_KEY_CTRL, 8 MODEM_RI, 9-17 NC/reserved, 18-20 GND.
Validation Targets
ERC/DRC clean, no airwires, BOM includes LCSC part numbers, pick-and-place generated if export support is available.

  • Overview

  • Key Requirements

  • Host Connector Pinout

  • Validation Targets