Schematic Design Issue Review
Fix the floating I2C pull-ups, RESET, address pins, and MCP23008 decoupling connections.
Thought for 44 sec
I've made a plan and started work on it.
go ahead and complete the plan
Thought for 37 sec
I've made a plan and started work on it.
dont plan anymore just do it.
Worked for 56 sec
Done — I wired R1/R2 as I2C pull-ups to 3V3, R3 to pull MCP23008 RESET up to 3V3, R4/R5/R6 as address pull-downs to GND, and C13 between MCP23008 VDD/3V3 and GND. Verification now shows those requested connections are present; MCP23008 still has unrelated floating GP6, GP7, and INT warnings.
Resolve floating pins
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Document MCP23008 settings
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Schematic-Level Design Review — Disky
Date: 2026-05-14
Scope: Schematic-level issues observed directly in the live Flux project. This review uses the schematic/netlist, BOM, ERC results, and component datasheet evidence where required. It does not include PCB placement/routing DRC.
Summary
- Must fix: 6 schematic-level issues
- Should fix / verify: 4 schematic-level issues
- Observed clean areas: Main 3V3/GND rails are present; IMU VDD/VDDIO pins are connected to 3V3; IMU GND pins are connected to GND; SPI nets and IMU chip-select nets exist.
Must-Fix Issues
Table
| # | Area | Observed issue | Evidence from schematic | Actionable correction |
|---|---|---|---|---|
| 1 | I2C pull-ups | The intended I2C pull-up resistors are not connected to the bus or 3V3. | R1 is labeled “I2C_SDA pull-up to 3V3” and R2 is labeled “I2C_SCL pull-up to 3V3”, but ERC reports both pins of R1 and R2 floating. The live netlist shows I2C_SDA has U1, U_MCP23008, U_VL53L0X, TP_SDA only; I2C_SCL has U1, U_MCP23008, U_VL53L0X, TP_SCL only. | Connect R1 between I2C_SDA and 3V3. Connect R2 between I2C_SCL and 3V3. |
| 2 | MCP23008 address pins | MCP23008 A0/A1/A2 are floating despite intended pull-down resistors. | ERC reports U_MCP23008:A0, A1, A2 floating. R4/R5/R6 are labeled as address pull-downs but both pins of each resistor are floating. MCP23008 datasheet states A2/A1/A0 are hardware address inputs and must be biased externally. | Connect U_MCP23008:A0 to R4, U_MCP23008:A1 to R5, U_MCP23008:A2 to R6; connect the other side of each resistor to GND. If address 0x20 is intended, pull all three low. |
| 3 | MCP23008 reset | MCP23008 ~RESET is floating and the intended reset pull-up is not connected. | ERC reports U_MCP23008:~RESET floating. R3 is labeled “U_MCP23008 RESET pull-up to 3V3” but both pins of R3 are floating. The RESET net contains only TP_RESET. MCP23008 datasheet states RESET is an external reset input and must be biased externally. | Connect U_MCP23008:~RESET to the RESET net and connect R3 from RESET to 3V3. If no external reset control is needed, tie ~RESET high through R3 and optionally keep TP_RESET on that net. |
| 4 | MCP23008 decoupling | MCP23008 local decoupling capacitor C13 is not connected. | C13 is labeled “U_MCP23008 VDD pin 18 decoupling”, but ERC reports C13:P1 and C13:P2 floating. The 3V3/GND net inspection does not include C13. | Connect C13:P1 to 3V3 and C13:P2 to GND, placed physically close to U_MCP23008 VDD/VSS during layout. |
| 5 | LSM6DS3 auxiliary pins | SDx and SCx are floating on all six IMUs. | ERC reports U_IMU1–U_IMU6 SDx and SCx floating. ST’s LSM6DS3TR-C pin description says SDx and SCx must be connected to VDDIO or GND in normal mode; they are only used as sensor-hub I2C master pins in sensor-hub mode. | If sensor-hub mode is not used, tie each IMU’s SDx and SCx to either 3V3/VDDIO or GND per the intended configuration. Do not leave them floating. |
| 6 | VL53L0X XSHUT | VL53L0X XSHUT is floating. | ERC reports U_VL53L0X:XSHUT floating. VL53L0X datasheet identifies XSHUT as an active-low digital input. | Connect XSHUT to an MCU GPIO if software shutdown/address sequencing is needed, or pull it up to 3V3 so the sensor is enabled by default. |
Should-Fix / Verify Issues
Table
| # | Area | Observed issue | Evidence from schematic | Recommended action |
|---|---|---|---|---|
| 1 | VL53L0X interrupt | GPIO1 is floating. | ERC reports U_VL53L0X:GPIO1 floating. VL53L0X datasheet identifies GPIO1 as an open-drain interrupt output. | If interrupts are needed, connect GPIO1 to an MCU GPIO and provide an appropriate pull-up. If unused, mark it no-connect intentionally. |
| 2 | IMU interrupts | INT1 and INT2 are floating on all six IMUs. | ERC reports INT1 and INT2 floating for U_IMU1–U_IMU6. These are programmable interrupt outputs. | If motion/data-ready interrupts are required, route them to MCU/MCP23008 GPIOs. If polling over SPI is intended, mark these pins no-connect intentionally to clear false-positive ERC warnings. |
| 3 | MCP23008 unused GPIO/INT | GP6, GP7, and INT are floating. | ERC reports U_MCP23008:GP6, GP7, and INT floating. The MCP23008 datasheet defines GPx as bidirectional I/O and INT as interrupt output. | If GP6/GP7 are unused, mark them no-connect or reserve them with test pads. Connect INT to U1 if interrupt-driven firmware is desired; otherwise mark no-connect. |
| 4 | Mounting/battery holes | H1 and H2 are floating. | ERC reports H1:1 and H2:1 floating. Their role says “battery pin through-hole,” not generic mechanical holes. | If they are intended electrical battery pins, connect them to the correct battery/charger nets. If purely mechanical access holes, mark no-connect or use non-electrical mounting holes. |
Observed Good / Not Flagged
- The main 3V3 net connects U1:3V3, all six IMU VDD/VDDIO pins, U_MCP23008:VDD, U_VL53L0X AVDD/AVDDVCSEL pins, and TP_3V3.
- The main GND net connects U1:GND, all IMU ground pins, U_MCP23008:VSS, U_VL53L0X ground pins, TP_GND, and the connected IMU decoupling capacitors C1–C12.
- SPI nets are logically present: SPI_SCK, SPI_MOSI, and SPI_MISO connect U1 to all six IMUs.
- Six separate IMU chip-select nets exist: IMU1_CS through IMU6_CS, each connecting one IMU CS pin to one MCP23008 GP pin.
- No LEDs were found in the BOM/schematic, so there are no observed LED current-limiting resistor issues.
Net Labeling / Schematic Readability Issues
- The functional net names themselves are good (3V3, GND, I2C_SDA, I2C_SCL, SPI_SCK, SPI_MOSI, SPI_MISO, IMU1_CS–IMU6_CS).
- Many net portal objects have long auto-generated designators like “U1 D9_A9_MISO_GPIO8_TOUCH8 - U_IMU1 SDO/SA0”. This is not an electrical failure, but it makes the schematic harder to audit. Consider shortening portal labels/designators to the actual net name only: SPI_MISO, SPI_MOSI, SPI_SCK, I2C_SDA, I2C_SCL, 3V3, GND, RESET.
Highest-Priority Fix Order
- Connect R1/R2 I2C pull-ups.
- Connect MCP23008 A0/A1/A2 bias resistors R4/R5/R6.
- Connect MCP23008 ~RESET and R3 pull-up.
- Connect C13 to 3V3/GND.
- Tie all LSM6DS3 SDx/SCx pins to a defined rail.
- Define VL53L0X XSHUT behavior.
- Mark intentionally unused interrupt/GPIO pins as no-connect or wire them if needed.
Tool Evidence Used
- Live schematic/netlist: 135 schematic components and 14 logical nets.
- BOM: 6× LSM6DS3TR-C, 1× MCP23008T-E/ML, 1× VL53L0CXV0DH, 1× Seeed Studio XIAO ESP32S3, 13 capacitors, 6 resistors, 5 testpoints, 2 mounting holes.
- ERC: 52 floating-pin warnings at review timestamp 2026-05-14T04:04:32.793Z.
- Datasheets: MCP23008 and VL53L0X via project datasheet tool; LSM6DS3TR-C via ST official datasheet web result because the project part lacked a datasheet URL.
Summary
Must-Fix Issues
Should-Fix / Verify Issues
Observed Good / Not Flagged
Net Labeling / Schematic Readability Issues
Highest-Priority Fix Order
Tool Evidence Used
