Understanding Schematic Design
@help why do we need multiple decoupling caps of different values on the ESP32 power pins?
Thought
Multiple decoupling capacitors on the ESP32’s power pins serve to filter noise across a very wide frequency range. Each value has its own “sweet-spot” impedance vs. frequency curve, so by combining them you get low impedance from DC up into the hundreds of megahertz.
Table
| Capacitor Value | Purpose | Frequency Range Filtered |
|---|---|---|
| 10 µF (bulk) | Holds up the rail for large, slow transients (e.g. Wi-Fi bursts) | DC – a few MHz |
| 0.1 µF (mid-range) | Local energy reservoir for medium-speed switching | ~1 MHz – 50 MHz |
| 0.01 µF or less (high-freq) | Snubs very fast spikes and RF noise | 50 MHz – hundreds MHz |
By placing:
– a large bulk cap close to your regulator,
– a 100 nF right beside the ESP32 IC1, and
– a small high-frequency cap (e.g. 10 nF or lower) right at the power pin itself
– a large bulk cap close to your regulator,
– a 100 nF right beside the ESP32 IC1, and
– a small high-frequency cap (e.g. 10 nF or lower) right at the power pin itself
you ensure that switching currents and RF bursts from the ESP32 have a low-impedance path to ground at all relevant frequencies, preventing supply-rail dips, oscillation, and RF-induced glitches.
Find bulk capacitor
Find high-frequency cap
Layout guidelines from datasheet
Routing practice
![ESPRSSO32 Smart Scale AI Auto Layout [Example] thumbnail](https://img-cdn.flux.ai/eyJidWNrZXQiOiJncmF2aXRvbi1lbGVjdHJpYy1zeW1ib2xzIiwia2V5IjoiZG9jdW1lbnRfYXNzZXRzL0VTUFJFU1NPMzJfU21hcnRfU2NhbGVfM0RfVGh1bW5haWwtY2QxNTI2NjItNjdjMi00MTk4LWJmNjUtNDJiZDk5N2E0ODYyLnBuZyIsImVkaXRzIjp7InJlc2l6ZSI6eyJ3aWR0aCI6MTM2LCJoZWlnaHQiOjEzNiwiZml0IjoiY29udGFpbiIsImJhY2tncm91bmQiOnsiciI6MCwiZyI6MCwiYiI6MCwiYWxwaGEiOjB9fX0sIm91dHB1dEZvcm1hdCI6IndlYnAifQ==){kind=small}