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U2 — TPS63900DSKR buck-boost converter U2 pin connections

Table

U2 pinConnected netConnected components
1 — ENBAT_FUSEDF2 P2, VIN, C15 P1, C17 P1, TP_BAT
2 — SELBAT-Grounded to select the CFG3-programmed output
3 — CFG1U2_CFG1R14 P1
4 — CFG2U2_CFG2R15 P1
5 — CFG3U2_CFG3R13 P1
6 — VOUT3V3_SYSC16 P1 and downstream 3.3 V loads
7 — LX2U2_LX2L2 P2
8 — GNDBAT-Battery return
9 — LX1U2_LX1L2 P1
10 — VINBAT_FUSEDF2 P2, EN, C15 P1, C17 P1, TP_BAT
11 — EPBAT-Exposed thermal/ground pad
VIN source
J2 pin 1 / BAT+ → F2 (1 A resettable fuse) → BAT_FUSED → U2 VIN
The return is BAT-, connected to system GND through the existing R11 0 Ω star link.
Inductor
  • L2: 2.2 µH, 1.5 A rated, 2 A saturation
    • P1 → U2_LX1 → U2 pin 9
    • P2 → U2_LX2 → U2 pin 7
Capacitors
  • C15: 10 µF, 10 V X7R input bulk
    • P1 → BAT_FUSED
    • P2 → BAT-
  • C17: 100 nF, 10 V X7R input bypass
    • P1 → BAT_FUSED
    • P2 → BAT-
  • C16: 22 µF, 10 V X7R output bulk
    • P1 → 3V3_SYS
    • P2 → BAT-
Configuration resistors
  • R13: 16.2 kΩ, 1%
    • U2_CFG3 → BAT-
    • Programs the selected 3.3 V output with SEL low
  • R14: 36.5 kΩ, 1%
    • U2_CFG1 → BAT-
  • R15: 0 Ω, 1%
    • U2_CFG2 → BAT-
    • Selects the configured input-current setting
VOUT net: 3V3_SYS, nominally 3.3 V.
Review regulator wiring
Check power budget
Audit radar supply
Run full ERC
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Files

Schematic

Layout

Preview

Schematic ERC Audit
Reviewed: 2026-08-25
Scope and classification
Fresh automated Electrical Rule Checks, passive checks, missing-footprint checks, and manufacturing-data checks were run against the current 71-component schematic. PCB airwires and trace-routing findings are excluded because this is a schematic audit and routing is intentionally deferred.
Classifications:
  • Real error — electrical connectivity or implementation issue that must be resolved.
  • Intentional warning — expected at the present design stage and acceptable until the stated next phase.
  • Missing data — sourcing, footprint, or metadata information required before manufacturing release.
Executive summary
  • Automated ERC reports zero open electrical errors or warnings.
  • Manual connectivity review found one real electrical error: the LIS2DW12 SCL net is not connected to the ESP32.
  • Manufacturing review reports 53 missing manufacturer part numbers.
  • Missing-footprint review reports zero unassigned footprints.
  • The current U4 PCB body measures approximately 13.7 × 13.0 mm, so the earlier 1.6 × 1.6 mm footprint-scale defect is no longer present in the live layout.
1. Power
Real errors
  • None reported by automated ERC.
Intentional warnings
  • None reported by automated ERC.
Missing data
The following battery/regulator components have footprints and electrical values but no production MPN:
  • R11 — 0 Ω BAT−/GND star link.
  • R13 — 16.2 kΩ TPS63900 CFG3 resistor.
  • R14 — 36.5 kΩ TPS63900 CFG1 resistor.
  • R15 — 0 Ω TPS63900 CFG2 resistor.
  • C15 — 10 µF TPS63900 input capacitor.
  • C16 — 22 µF TPS63900 output capacitor.
  • C17 — 100 nF TPS63900 bypass capacitor.
  • L2 — 2.2 µH TPS63900 inductor; this is especially important because saturation current, DCR, dimensions, and thermal performance depend on the final MPN.
  • TP_BAT, TP_GND — test-point MPNs are unset.
2. ESP32
Real errors
  • No automated ESP32 ERC error is open.
Intentional warnings
  • Unused ESP32 pins are explicitly marked no-connect. This is intentional.
  • UART debug nets U0TXD and U0RXD, boot/reset support, GPIO6 radar-enable, GPIO18 radar TX, GPIO19 radar RX, GPIO10 SDA, and GPIO3 motion interrupt are connected.
Missing data
  • J4 — UART debug header has no MPN.
  • R16 — 10 kΩ EN pull-up has no MPN.
  • R17 — 10 kΩ GPIO9 boot pull-up has no MPN.
  • C18 — 10 µF ESP32 rail bulk capacitor has no MPN.
  • C19 — 100 nF ESP32 decoupling capacitor has no MPN.
  • C20 — 1 µF EN timing capacitor has no MPN.
3. Radar
Real errors
  • None. The radar interface is electrically complete at schematic level:
    • 3V3_SYS → Q3 AO3407A → RADAR_3V3 → J3 pin 1.
    • GPIO6 → Q4 2N7002 control network.
    • J3 pin 2 → GND.
    • J3 pin 3 RADAR_TX → ESP32 GPIO18.
    • J3 pin 4 RADAR_RX → ESP32 GPIO19.
    • C23/C24/C25 are connected from RADAR_3V3 to GND.
Intentional warnings
  • No routing exists yet. Physical airwires are expected and are not schematic ERC failures.
Missing data
  • J3 — radar connector has no production MPN.
  • J3 metadata — its Role and Functional Group still describe the former charger-status connector. Electrical connectivity is correct, but the stale metadata should be updated before release.
  • R20 — 100 Ω series gate resistor has no MPN.
  • R21 — 100 kΩ AO3407A gate-source pull-up has no MPN.
  • R22 — 100 kΩ 2N7002 gate pull-down has no MPN.
  • C23 — 100 nF radar bypass capacitor has no MPN.
  • C24 — 10 µF radar bulk capacitor has no MPN.
  • C25 — 470 µF/10 V electrolytic reservoir capacitor has no MPN; final ESR, ripple-current rating, lifetime, and height must be verified.
4. LIS2DW12
Real errors
  • GPIO11_SCL is not connected to the ESP32. The net contains only U5 SCL and pull-up R19. The installed ESP32-C3-MINI-1U symbol exposes GPIO10 but does not expose GPIO11, so the requested original GPIO11 assignment cannot be implemented as drawn. A different available ESP32 GPIO must be selected for I²C SCL and the net renamed accordingly.
Intentional warnings
  • GPIO10_SDA connects U4 GPIO10, U5 SDA, and pull-up R18.
  • GPIO3_MOTION_INT connects U5 INT1 to ESP32 GPIO3.
  • U5 CS is tied high for I²C operation, and SDO/SA0 is tied low for the selected address. These are intentional.
Missing data
  • R18, R19 — 4.7 kΩ I²C pull-ups have no MPN.
  • C21 — 100 nF LIS2DW12 decoupling capacitor has no MPN.
  • C22 — 10 µF local bulk capacitor has no MPN.
5. Charger
Real errors
  • None reported by the current automated ERC. Charger power, gate-drive, current-sense, MPPT, feedback, temperature-sense, and status nets have multi-component connectivity.
Intentional warnings
  • CHARGE_STATUS and CHARGE_DONE are no longer brought to J3 because J3 was reassigned as the radar connector. They remain valid internal nets connected to U3 and their pull-ups.
  • RT1 is excluded from PCB because it is the battery-attached thermistor. This is intentional.
Missing data
The following charger components use generic/provisional entries without production MPNs:
  • R1–R10, excluding none: R1, R2, R3, R4, R5, R6, R7, R8, R9, R10.
  • R12 — 80 mΩ charge-current shunt; final MPN and Kelvin-sense-capable land pattern are required.
  • C1–C14, excluding none: C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14.
  • L1 — 22 µH charger inductor; final MPN, DCR, saturation current, RMS current, and footprint remain required.
Existing charger review notes remain applicable to non-generic parts:
  • D2 TVS selection depends on confirmed panel maximum Voc and surge requirements.
  • Q1/Q2 package/land-pattern dimensions should be checked against the official PowerPAK SO-8 data before manufacturing.
6. Footprints and manufacturing data
Real errors
  • None from the missing-footprint checker: zero components are currently reported without footprints.
Intentional warnings
  • No PCB traces are routed. Airwires are expected and deliberately excluded from this schematic-only audit.
  • Component Review Checks did not run because they apply to standalone component projects, not this board project. Their absence is not evidence that every library part is correct.
Missing data
The manufacturing checker reports 53 components without manufacturer part numbers:
  • Resistors: R1–R22 where generic — R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, R21, R22.
  • Capacitors: C1–C25 — all current capacitors are generic and have no MPN.
  • Inductors: L1, L2.
  • Connectors: J3, J4.
  • Test points: TP_BAT, TP_GND.
Production release should not proceed until these parts have selected MPNs and their voltage/current/temperature/package constraints are verified.
  1. Select an available ESP32 GPIO for LIS2DW12 SCL and replace the unresolved GPIO11_SCL assignment.
  2. Update J3 metadata to identify it as the radar connector.
  3. Select critical power MPNs first: L1, L2, R12, C25, then regulator/charger capacitors.
  4. Select connector and test-point MPNs.
  5. Assign remaining resistor/capacitor MPNs and repeat ERC/manufacturing checks before placement approval and routing.

  • Scope and classification

  • Executive summary

  • 1. Power

  • Real errors

  • Intentional warnings

  • Missing data

  • 2. ESP32

  • Real errors

  • Intentional warnings

  • Missing data

  • 3. Radar

  • Real errors

  • Intentional warnings

  • Missing data

  • 4. LIS2DW12

  • Real errors

  • Intentional warnings

  • Missing data

  • 5. Charger

  • Real errors

  • Intentional warnings

  • Missing data

  • 6. Footprints and manufacturing data

  • Real errors

  • Intentional warnings

  • Missing data

  • Recommended correction order