Part Review WMS08N06TS


I’ll inspect the existing part metadata/symbol/footprint, find and set the official datasheet URL if missing, then cross-check pins and package details against the datasheet.
The part already has a Wayon datasheet URL set, so I’m verifying against that source rather than changing it.
I found the pin mapping matches the datasheet at a functional level; the main issue so far is that the terminal Pin Type/Pin Description fields are not populated.
Created a project doc

Part Review - WMS08N06TS

View Document

Review date: 2026-07-17 Project / part name: WMS08N06TS
Completed the WMS08N06TS part review and created Part Review - WMS08N06TS. The datasheet URL was already set, so I did not change it; pinout and footprint are broadly consistent with the Wayon datasheet.
Open items:
  • Terminal Pin Type and Pin Description fields are missing.
  • Explicit Package or Case Code: SOP-8L is not set.
  • Footprint is plausible for SOP-8L, but no Wayon land pattern was found to verify pad geometry directly.
Suggested next steps:
  1. Add pin descriptions/types for Gate, Drain, and Source.
  2. Add the explicit SOP-8L package property.
  3. Re-check footprint if you obtain a manufacturer land-pattern drawing.
Fix metadata and verify
Fix terminal metadata
Set package property
Run review checks
Check footprint geometry

S_2
Pin Number
2
D_4
Pin Number
8
D_2
Pin Number
6
S_1
Pin Number
1
G
Pin Number
4
D_1
Pin Number
5
S_3
Pin Number
3
D_3
Pin Number
7
Part Review - WMS08N06TS
Review date: 2026-07-17
Reviewed project data
  • Project / part name: WMS08N06TS
  • Manufacturer Part Number: WMS08N06TS
  • Manufacturer Name: Wayon
  • Part Type property: Transistors
  • Project description: Transistor: N-MOSFET; unipolar; 60V; 8A; Idm: 32A; 3.1W; SOP8
  • Datasheet URL property: https://www.way-on.cn/upload/202312/07/202312071454546645.pdf
  • Published part UID: c9d8d1f1-bcce-4f11-b9fb-0ad3be807e08
  • Terminal count: 8 schematic terminals
  • PCB pad count: 8 SMD pads
  • Footprint asset / label: SOIC127P600X175-8N, described as SOP-8L / MOSFET N-channel
  • 3D model: WMS08N06TS.stp referenced by the footprint/model node
The part already had a Datasheet URL property set, so no Datasheet URL update was performed. The datasheet extraction source identified the document as Wayon WMS08N06TS, Rev. 2.0, 2023, Doc: W0803526. The datasheet tool also surfaced a Wayon mirror URL under way-on.com; the existing project URL is also on a Wayon domain (way-on.cn).
Datasheet key specs
From the Wayon WMS08N06TS datasheet:

Table


ParameterDatasheet value
Device type60 V N-channel enhancement-mode power MOSFET
PackageSOP-8L
MarkingS08N06
VDS max60 V
VGS max+/-20 V
Continuous drain current, TA = 25 C8 A
Continuous drain current, TA = 100 C5 A
Pulsed drain current32 A
Total power dissipation, TA = 25 C3.1 W
Single-pulse avalanche energy24.2 mJ
RDS(on), VGS = 10 V, ID = 7 A27 mohm typ, 35 mohm max
RDS(on), VGS = 4.5 V, ID = 4 A35 mohm typ, 45 mohm max
Gate threshold voltage, ID = 250 uA1.2 V min, 1.7 V typ, 2.5 V max
Total gate charge, VGS = 10 V22 nC typ
Gate-source charge4.2 nC typ
Gate-drain charge3.7 nC typ
Junction-to-ambient thermal resistance40.3 C/W
Operating/storage temperature-55 C to 150 C
Pinout cross-check
Datasheet pinout:

Table


PinDatasheet functionProject terminalResult
1SourceS_1Matches
2SourceS_2Matches
3SourceS_3Matches
4GateGMatches
5DrainD_1Matches
6DrainD_2Matches
7DrainD_3Matches
8DrainD_4Matches
Functional pin mapping is correct: pins 1-3 are Source, pin 4 is Gate, and pins 5-8 are Drain.
Symbol / terminal metadata review
The schematic symbol exposes all eight physical pins as separate terminals. This is acceptable for an SOP-8L power MOSFET because multiple package leads share the same internal electrode and separate terminals allow layout-aware copper connections.
Issues / cleanup items:
  • All terminals currently have Pin Type: Unspecified.
  • No Pin Description values are populated on the terminals.
  • Recommended descriptions:
    • Pins 1, 2, 3: Source
    • Pin 4: Gate
    • Pins 5, 6, 7, 8: Drain
  • Recommended pin-type cleanup should follow the project/library convention for MOSFET terminals; at minimum, leaving all pins unspecified is less useful for review/ERC than explicitly describing Gate/Drain/Source.
Footprint cross-check
Observed footprint:
  • Footprint: SOIC127P600X175-8N / SOP-8L style
  • 8 SMD rectangular pads
  • Pitch: 1.27 mm nominal from pad spacing
  • Pad size: 0.65 mm x 1.55 mm
  • Pad centers: x = +/-2.725 mm, y = +/-1.905 mm and +/-0.635 mm
  • Fab outline approximately 3.90 mm x 4.924 mm
  • Courtyard approximately 7.50 mm x 5.65 mm
Datasheet mechanical dimensions:

Table


SymbolDatasheet minDatasheet max
A1.35 mm1.75 mm
a10.05 mm0.25 mm
b0.31 mm0.51 mm
b10.16 mm0.25 mm
D4.70 mm5.15 mm
E5.75 mm6.25 mm
e1.07 mm1.47 mm
F3.70 mm4.10 mm
L0.40 mm1.27 mm
Footprint assessment:
  • The 1.27 mm nominal pitch is consistent with the SOP-8L/SOIC-8 class and falls within the datasheet e range.
  • Pad width 0.65 mm is reasonable for 0.31-0.51 mm leads.
  • Pad span and fab/courtyard geometry are plausible for the datasheet SOP-8L outline.
  • No manufacturer-recommended land pattern was found in the datasheet extraction, so the footprint is plausibility-checked against mechanical dimensions rather than confirmed against an official Wayon land pattern.
Mismatches and concerns
No critical functional mismatch was found.
Flagged items:
  1. Terminal metadata incomplete: all pins have Pin Type: Unspecified and no Pin Description.
  2. Explicit package property appears absent in project properties. The description and footprint indicate SOP8/SOP-8L, but adding Package or Case Code: SOP-8L would make the part metadata clearer.
  3. Part Type is broad (Transistors). This is not wrong, but a more specific category such as MOSFET / N-channel MOSFET may be clearer if supported by the property taxonomy.
  4. Footprint is reasonable for SOP-8L, but the datasheet extraction did not include a manufacturer land pattern; pad dimensions are not directly verified against a Wayon-recommended footprint.
  5. Split Source and Drain pins are correct for the package, but the lack of terminal descriptions makes it less obvious that S_1/S_2/S_3 and D_1/D_2/D_3/D_4 are common internal electrodes.
  • Add terminal Pin Description values for Source, Gate, and Drain.
  • Set terminal Pin Type values according to the library convention for MOSFET parts.
  • Add explicit Package or Case Code: SOP-8L if desired.
  • If an official Wayon land pattern drawing becomes available, re-check pad sizes and solder-mask/paste geometry against that drawing.
  • Reviewed project data

  • Datasheet key specs

  • Pinout cross-check

  • Symbol / terminal metadata review

  • Footprint cross-check

  • Mismatches and concerns

  • Recommended next fixes