Part Audit Review

Yes. I’ll group every pin once by its primary function—Power, Ground, Inputs, and Outputs—without duplicates, and keep each pin’s Section matched to its Pin Group while completing the datasheet audit.
The metadata and pin grouping are updated. I’m doing a final read-back of all 14 terminals and checking the official TI package/pin data before closing the audit.
Created a project doc

Part Audit Report

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Manufacturer: Texas Instruments MPN: SN74LV6T14QPWRQ1
Completed the full audit and grouped every pin exactly once: Inputs, Outputs, Power, and Ground. Pin mapping and the TSSOP-14 footprint match TI documentation; the incorrect wettable-flank claim was removed.
  • The existing datasheet field already contained a valid mirrored PDF, so it was not replaced; the canonical TI URL is recorded.
  • The terminal metadata is correct, but the generated symbol still has a visual rendering/asset issue that should be checked before publishing.
Full findings: Part Audit Report
Fix symbol and review
Fix symbol rendering
Update datasheet URL
Rerun ERC DRC
Check BOM sourcing

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Part Audit Report
Official identification
Key specifications
  • Recommended supply voltage: 1.6 V to 5.5 V
  • Input voltage range: 0 V to 5.5 V
  • Output voltage range: 0 V to VCC
  • Operating free-air temperature: -40 C to +125 C
  • Output current under recommended conditions: +/-3 mA at 1.6-2.0 V, +/-7 mA at 2.25-2.75 V, and +/-15 mA at 3.3-5.0 V
  • Up to 150 Mbps operation is advertised at 3.3 V or 5 V VCC
  • AEC-Q100 Grade 1 family qualification
Pin verification and grouping

Table


PinNameTypePrimary groupDescription
11AInputInputsChannel 1 Schmitt-trigger input A
21YOutputOutputsChannel 1 inverted output Y
32AInputInputsChannel 2 Schmitt-trigger input A
42YOutputOutputsChannel 2 inverted output Y
53AInputInputsChannel 3 Schmitt-trigger input A
63YOutputOutputsChannel 3 inverted output Y
7GNDGroundGroundGround reference
84YOutputOutputsChannel 4 inverted output Y
94AInputInputsChannel 4 Schmitt-trigger input A
105YOutputOutputsChannel 5 inverted output Y
115AInputInputsChannel 5 Schmitt-trigger input A
126YOutputOutputsChannel 6 inverted output Y
136AInputInputsChannel 6 Schmitt-trigger input A
14VCCPower InPowerPositive supply voltage
Every physical pin is assigned to exactly one primary group. Section matches Pin Group for all terminals. Inputs are oriented Left with orders 1-6; Outputs are oriented Right with orders 1-6; VCC is Power/Top/order 1; GND is Ground/Bottom/order 10.
Footprint cross-check
  • 14 surface-mount pads: correct
  • Pad pitch: 0.65 mm, correct
  • Current pad size: 0.45 mm x 1.475 mm, effectively consistent with TI's approximately 0.45 mm x 1.5 mm land recommendation
  • Current row span: approximately 5.876 mm, consistent with the TI recommended land-pattern span near 5.8 mm
  • PW0014A package body: 5.0 mm x 4.4 mm nominal, 1.2 mm maximum height
  • Pin-1 silk indicator is present
Corrections and mismatches
  • Corrected the description/package metadata to standard PW TSSOP-14.
  • Removed the implication that the PWRQ1 ordering code itself uses wettable flanks. TI offers wettable flanks on the separate BQA/WQFN package; PW is the TSSOP option.
  • Added Pin Description, Pin Type, Pin Group, Section, Pin Orientation, and Terminal Order to all terminals.
  • The stored Datasheet URL was already populated with a mirrored copy, so the conditional request to add a URL was not triggered. The canonical TI URL is recorded above; an attempted replacement did not persist through the available metadata interface.
  • Terminal metadata reads back correctly, but the generated symbol has shown a renderer/asset presentation issue. This does not indicate a pin-number or footprint-mapping mismatch, but visual symbol rendering should be rechecked before publishing.
  • A generic project DRC error was reported without accessible item-level detail; it was not identified as a footprint geometry error.
  • Official identification

  • Key specifications

  • Pin verification and grouping

  • Footprint cross-check

  • Corrections and mismatches

Documents

Assets

SN74LV6T14QPWRQ1

SN74LV6T14QPWRQ1

SN74LV6T14QPWRQ1.stp3D Model
svg

SN74LV6T14QPWRQ1

SN74LV6T14QPWRQ1 Symbol.svg
SN74LV6T14QPWRQ1-thumb.png

SN74LV6T14QPWRQ1-thumb.png

SN74LV6T14QPWRQ1-thumbThumbnail
kicad_mod

SN74LV6T14QPWRQ1

SOP65P640X120-14N.kicad_modFootprint

SN74LV6T14QPWRQ1

SN74LV6T14QPWRQ1 thumbnail
Automotive-qualified six-channel Schmitt-trigger inverter and single-supply level translator. SN74LV6T14QPWRQ1 is the 14-pin TI PW (PW0014A) TSSOP reel ordering code, with 0.65 mm lead pitch, 1.6 V to 5.5 V recommended supply range, 5.5 V-tolerant inputs, up to 150 Mbps operation at 3.3 V or 5 V VCC, and −40°C to 125°C operation. AEC-Q100 qualified. Standard leaded TSSOP package; not wettable-flank.

Properties

-40°C to 125°C

Automotive hex Schmitt-trigger inverter/level translator; TI orderable SN74LV6T14QPWRQ1 uses PW0014A standard TSSOP-14, 0.65 mm pitch; not a wettable-flank package.

AEC-Q100

1.6

V

SN74LV6T14QPWRQ1

Texas Instruments

Integrated Circuit

IC

Surface Mount

14-TSSOP

parametric-v1

Pricing & Availability

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