LMR38020 Part Audit

flux

The official TI data confirms an 8-pin DDA HSOIC PowerPAD plus exposed thermal pad. I found incorrect metadata and a likely footprint pad-to-terminal mapping reversal; I’m updating the datasheet link and finishing the audit report.

flux

Completed
  • Updated the root part’s Datasheet URL to: https://www.ti.com/lit/ds/symlink/lmr38020-q1.pdf
Verification
  • get_project confirms the exact URL is now stored.
  • Commit #5e375724 changed only the Datasheet URL property path, with one forward patch.
  • Symbol verification still shows all 9 terminals unchanged, including pin numbers and mappings.
Created a project doc

LMR38020FSQDDARQ1 Part Datasheet Audit

View Document
Official TI datasheet: https://www.ti.com/lit/ds/symlink/lmr38020-q1.pdf TI orderable-part page: https://www.ti.com/product/LMR38020-Q1/part...

flux

Audit complete. I updated the Datasheet URL to the exact TI LMR38020-Q1 PDF and filed an internal part-quality report.
  • Critical: All eight perimeter footprint terminals appear mapped to the wrong physical pads; the part is unsafe to use as-is.
  • Package is incorrectly listed as TO; it should be DDA, 8-pin HSOIC PowerPAD.
  • Symbol pin names/numbers are correct, but pin types and descriptions are missing.
  • Full findings: LMR38020FSQDDARQ1 Part Datasheet Audit
Fix and verify part
Fix footprint mapping
Update part metadata
Review after fixes
Export audit summary
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Files

Pins

Symbol

Layout

Preview

SW
Pin Number
8
VIN
Pin Number
3
BOOT
Pin Number
7
EP
Pin Number
9
GND
Pin Number
1
FB
Pin Number
5
RT/SYNC
Pin Number
4
PG
Pin Number
6
EN
Pin Number
2
LMR38020FSQDDARQ1 Part Datasheet Audit
Sources
Available part information

Table

FieldCurrent part valueDatasheet / TI valueResult
MPNLMR38020FSQDDARQ1LMR38020FSQDDARQ1Match
ManufacturerTexas InstrumentsTexas InstrumentsMatch
DescriptionAutomotive SIMPLE SWITCHER, 4.2-V to 80-V, 2-A synchronous buck converter4.2-V to 80-V, 2-A automotive synchronous SIMPLE SWITCHER; FPWM and spread-spectrum variantSubstantially correct; omits FPWM/spread-spectrum detail
Terminal count9 terminals8 leads plus exposed thermal padMatch when EP is represented as terminal 9
Package propertyTOHSOIC PowerPAD, TI DDA, 8 pins; drawing DDA0008BMismatch
Part Type propertyLinear RegulatorSynchronous buck switching regulator / power management ICMismatch
Datasheet URLUpdated to exact LMR38020-Q1 PDFOfficial TI PDF aboveCorrected
Designator prefixICIC/U conventions are reasonableAcceptable
Key specifications
  • Automotive AEC-Q100 qualified; grade 1 ambient rating.
  • 4.2 V to 80 V recommended input range after startup; 85 V absolute maximum on VIN.
  • 2 A continuous output-current rating.
  • Adjustable output: 1 V to 75 V.
  • F orderable variant: forced PWM; spread spectrum enabled.
  • Adjustable switching frequency: 200 kHz to 2.2 MHz; synchronization: 300 kHz to 2.1 MHz.
  • Typical feedback reference: 1.0 V.
  • Integrated high-side and low-side MOSFETs; typical on-resistance 303 mΩ / 133 mΩ.
  • Operating junction temperature: -40 °C to 150 °C.
  • DDA 8-pin HSOIC PowerPAD, nominal body approximately 4.9 mm × 3.9 mm, 1.27 mm lead pitch, 1.7 mm maximum height.
Schematic symbol and pins
The symbol has all required terminals and the terminal names/numbers match the datasheet:

Table

PinNameDatasheet functionSymbol result
1GNDPower and analog groundName/number match
2ENEnable input; do not floatName/number match
3VINInput supplyName/number match
4RT/SYNCFrequency-setting resistor / synchronization inputName/number match
5FBFeedback inputName/number match
6PGOpen-drain power-good outputName/number match
7BOOTBootstrap supply; 100 nF to SWName/number match
8SWSwitching node / inductor connectionName/number match
9 / EPEPExposed thermal pad; connect to system groundFunctional representation is acceptable
Symbol metadata mismatches
  • Every terminal has Pin Type = Unspecified; electrical types are not encoded.
  • No Pin Description values are populated.
  • Recommended types: GND = Ground; VIN and BOOT = Power In; EN, RT/SYNC, FB = Input/Signal; PG = Open Collector or Output; SW = Power Out; EP = Ground/Thermal.
  • The symbol's visible placement is consistent with the datasheet top-view grouping: GND/EN/VIN/RT-SYNC on the left, SW/BOOT/PG/FB on the right, EP below.
Footprint cross-check
Geometry
  • Footprint asset is named SOIC127P600X170-9N and describes DDA / PDSO-G8.
  • Eight perimeter pads use 1.27 mm pitch, with 0.65 mm × 1.525 mm copper lands. TI's example land pattern calls for approximately 0.6 mm × 1.55 mm; this is close and generally consistent.
  • Exposed pad is 2.4 mm × 3.1 mm. TI's current example board layout shows a central metal area around 2.71 mm × 3.4 mm, subject to creepage requirements. The existing EP is smaller and should be reviewed against the intended creepage/thermal strategy.
  • Body outline is approximately 3.9 mm × 4.9 mm, consistent with DDA nominal body dimensions.
Critical footprint mismatch: terminal-to-pad mapping
The footprint asset numbers its perimeter lands as follows: pads 1–4 progress from the lower-left to upper-left, and pads 5–8 progress from upper-right to lower-right. The current terminal assignments are mapped in the opposite order on both sides:

Table

Physical footprint padCurrent terminal at that locationRequired terminal
1RT/SYNCGND
2VINEN
3ENVIN
4GNDRT/SYNC
5SWFB
6BOOTPG
7PGBOOT
8FBSW
9EPEP
This is a severe electrical mismatch: if fabricated as currently mapped, all eight perimeter connections would land on incorrect IC pins. The exposed pad mapping is correct.
Overall assessment
Not safe to use as-is. The symbol names and logical pin numbers are correct, but the package metadata is wrong, pin descriptions/types are absent, the exposed-pad land is smaller than TI's current example, and—most importantly—the footprint's terminal-to-pad assignments appear reversed on both rows. Correct the pad mapping before using or publishing the part.

  • Sources

  • Available part information

  • Key specifications

  • Schematic symbol and pins

  • Symbol metadata mismatches

  • Footprint cross-check

  • Geometry

  • Critical footprint mismatch: terminal-to-pad mapping

  • Overall assessment