Completed the audit and grouped all 15 terminals by function with no duplicated pins. I also replaced the distributor link with TI’s official datasheet; the main issues are unspecified pin types/descriptions and footprint dimensions that differ from TI’s recommended NHL land pattern.
Assign a Terminal Order from 1 to 10, starting with Power. Power should be Terminal Order 1, and Ground should be last, Terminal Order 10. For Orientation, set Power to "Top" and Ground to "Bottom." For the remaining sections/groups, you may decide the Terminal Order and Orientation yourself. For Orientation, distribute them between "Left" and "Right" — don't put everything on one side. Each group/section should have a different orientation.
I’ll consolidate the pins into broader groups, assign group-level order from Power = 1 through Ground = 10, and alternate the non-power groups between Left and Right while keeping Power Top and Ground Bottom.
Reviewed the part identity and properties, official Texas Instruments datasheet, schematic symbol terminals, functional grouping, PCB footprint, and 3D asset.
Identity and metadata
Table
Field
Current value
Assessment
Manufacturer part number
LMP91000SDX/NOPB
Matches TI orderable part
Manufacturer
Texas Instruments
Correct
Part type
Sensors
Acceptable, though Analog Front End / Sensor AFE would be more specific
Configurable potentiostat analog front end for 2-electrode and 3-electrode electrochemical sensors.
Supply range: 2.7 V to 5.25 V.
Average supply current: less than 10 µA.
Programmable TIA gains: 2.75 kΩ, 3.5 kΩ, 7 kΩ, 14 kΩ, 35 kΩ, 120 kΩ, and 350 kΩ.
TIA gain accuracy: 5%.
I²C-compatible interface; 7-bit address 0x48.
Analog output drive current: 750 µA.
Cell-conditioning current capability: up to 10 mA.
Integrated temperature sensor available through VOUT.
Package: 14-pin WSON, NHL, nominal 4.0 mm × 4.0 mm, 0.8 mm maximum height, 0.50 mm pitch.
Pinout cross-check
Pins 1 through 14 match the TI datasheet exactly:
Table
Pin
Name
Datasheet function
1
DGND
Digital ground
2
MENB
Active-low module enable
3
SCL
I²C clock input
4
SDA
I²C bidirectional data
5
NC
Not internally connected
6
VDD
Supply voltage
7
AGND
Analog ground
8
VOUT
Analog output
9
C2
External filter connection
10
C1
External filter connection
11
VREF
Voltage-reference input
12
WE
Working-electrode drive/output
13
RE
Reference-electrode input
14
CE
Counter-electrode drive/output
DAP
EP in project, numbered 15
Exposed pad; connect to AGND
Symbol organization applied
Every physical terminal is assigned to exactly one group, with Section equal to Pin Group:
Power: VDD
Ground: DGND, AGND, EP/DAP
Digital Interface: SCL, SDA
Control: MENB
Analog Output / Filter: VOUT, C2, C1
Reference: VREF
Electrochemical Cell: WE, RE, CE
No Connect: NC
Mismatches and quality flags
1. Missing pin descriptions and electrical types
All terminals currently have Pin Type = Unspecified, and no Pin Description properties are populated. The names and numbers are correct, but this reduces symbol clarity and ERC quality. Recommended types are Ground for DGND/AGND/EP, Power for VDD, Input for MENB/SCL/VREF/RE, Bidirectional for SDA, Output for VOUT/WE/CE, and Passive or Not Connected for C1/C2/NC as appropriate to Flux's available type vocabulary.
2. Exposed-pad naming/numbering differs from TI
TI calls the exposed pad DAP and does not assign it a numbered lead in the pin table. The project calls it EP and maps it as terminal/pad 15. Numbering the exposed pad as 15 is a common EDA convention and is electrically usable, but the pin description must explicitly state Connect to AGND.
3. Footprint differs materially from TI's recommended land pattern
The project footprint is named SON50P400X400X80-15N, which correctly represents a 0.50 mm-pitch, 4 mm × 4 mm WSON with 15 PCB pads. However, its computed geometry differs from the official TI NHL land pattern:
Table
Feature
Current project
TI recommended
Assessment
Perimeter pad size
0.30 × 0.85 mm
0.30 × 0.75 mm
Project pads are 0.10 mm longer
Perimeter pad center from X centerline
±1.95 mm
±1.80 mm
Project rows are 0.15 mm farther outward
Y pitch/positions
0.50 mm; ±1.50/1.00/0.50/0
Same
Matches
Exposed pad
2.70 × 3.10 mm
2.60 × 2.60 mm
Project EP is larger and non-square
This is the main manufacturability risk. The footprint may be an IPC-derived alternative, but it is not a match to TI's published recommended land pattern. Before production, replace or override it with a datasheet-backed NHL0014B land pattern and use segmented/window-pane paste apertures on the exposed pad.
4. Footprint paste and mask settings not explicitly available in the audit output
The imported footprint's detailed paste aperture and solder-mask expansion values were not exposed by the available computed PCB rules. Because this is an exposed-pad WSON, stencil segmentation and paste coverage should be verified directly before manufacturing.
5. 3D model metadata
A STEP model is present and rotated 90° / 0° / 90°. No dimensional model fit was proven by this audit; manufacturing should rely on the footprint and TI package drawing rather than the render.
Overall result
Identity, package family, pin count, and pins 1–14: Correct.
Official datasheet link: Corrected.
Functional pin grouping: Completed with no duplicated physical pins.
Symbol metadata quality: Incomplete because electrical pin types and descriptions are unspecified.
Footprint: Flagged for correction or rigorous validation because several dimensions do not match TI's recommended NHL land pattern.
Review scope
Identity and metadata
Key specifications
Pinout cross-check
Symbol organization applied
Mismatches and quality flags
1. Missing pin descriptions and electrical types
2. Exposed-pad naming/numbering differs from TI
3. Footprint differs materially from TI's recommended land pattern
4. Footprint paste and mask settings not explicitly available in the audit output