ES9822QPRO Review

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Assigned pin orientation, section, and terminal order for all 41 existing ES9822QPRO terminals and verified the updates. Power pins are ordered first, ground/EPAD last, and the larger Digital/NC groups are split across left/right for readability.
Open items:
  • Per your instruction, I did not rename pins; note pin 40 is still labeled DGND_2 even though the datasheet function is RT1.
  • Pin 41 remains labeled DGND_3, but is organized as the final Ground/EPAD terminal.
Suggested next steps:
  1. Rename pin 40 to RT1 and pin 41 to EPAD if you want the symbol labels corrected.
  2. Populate Pin Type and Pin Description from the datasheet.
C

cherepanyadima

Distribute all pins approximately evenly between the Left and Right sides of the schematic symbol.
Place power pins at the Top and first in Terminal Order. Place GND pins at the Bottom, Left, or Right and last in Terminal Order.
Keep related pins together, balance the symbol, and do not change pin names, numbers, or mapping.

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I’ll rebalance the existing symbol metadata only: keep power at top/order first, keep GND/EPAD last, and split the remaining functional groups roughly evenly left/right without changing names, numbers, or mappings.

flux

Rebalanced the symbol metadata while preserving all pin names, numbers, and mappings. The non-power/non-ground pins are now split approximately evenly: 14 Left and 15 Right, with power pins Top/orders 1–7 and GND/EPAD Bottom/orders 37–41.
Open items:
  • None for this requested metadata change.
Suggested next steps:
  1. Review the rendered symbol for visual spacing.
  2. Optionally correct labels for pin 40 (RT1) and pin 41 (EPAD) in a separate pass.
Fix labels and review
Correct pin labels
Populate pin metadata
Run ERC review
Check symbol layout
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Files

Pins

Symbol

Layout

3D View

GPIO10
Pin Number
1
GPIO11
Pin Number
2
GPIO4
Pin Number
36
AVCC_R
Pin Number
21
IN_P1
Pin Number
12
SS/ADDR1
Pin Number
27
AGND
Pin Number
6
GPIO2
Pin Number
38
DGND_1
Pin Number
31
VREF_R
Pin Number
22
NC_1
Pin Number
14
ACLK
Pin Number
4
GPIO3
Pin Number
37
IN_P2
Pin Number
19
GPIO8
Pin Number
32
SCLK/SCL
Pin Number
26
AVCC_L
Pin Number
10
GPIO6
Pin Number
34
GPIO5
Pin Number
35
XOUT
Pin Number
7
NC_2
Pin Number
15
GPIO1
Pin Number
39
MOSI/SDA
Pin Number
25
IN_M2
Pin Number
18
IN_M1
Pin Number
13
DGND_2
Pin Number
40
AVCC
Pin Number
5
AVDD
Pin Number
30
GPIO7
Pin Number
33
CHIP_EN
Pin Number
23
DGND_3
Pin Number
41
VREF_L
Pin Number
9
AGND_R
Pin Number
20
GPIO9
Pin Number
24
NC_3
Pin Number
16
XIN
Pin Number
8
DVDD
Pin Number
29
MODE
Pin Number
3
AGND_L
Pin Number
11
NC_4
Pin Number
17
MISO/ADDR2
Pin Number
28
Name
Pin #
Type
Part Type
Pin Orientation
Section
Terminal Order
GPIO10
1
Unspecified
Terminal
left
Digital
22
GPIO11
2
Unspecified
Terminal
left
Digital
23
MODE
3
Unspecified
Terminal
left
Control
15
ACLK
4
Unspecified
Terminal
left
Input
8
AVCC
5
Unspecified
Terminal
top
Power
1
AGND
6
Unspecified
Terminal
bottom
Ground
37
XOUT
7
Unspecified
Terminal
right
Output
10
XIN
8
Unspecified
Terminal
left
Input
9
VREF_L
9
Unspecified
Terminal
top
Power
4
AVCC_L
10
Unspecified
Terminal
top
Power
2
AGND_L
11
Unspecified
Terminal
bottom
Ground
38
IN_P1
12
Unspecified
Terminal
left
Analog
11
IN_M1
13
Unspecified
Terminal
left
Analog
12
NC_1
14
Unspecified
Terminal
left
NC
33
NC_2
15
Unspecified
Terminal
left
NC
34
NC_3
16
Unspecified
Terminal
right
NC
35
NC_4
17
Unspecified
Terminal
right
NC
36
IN_M2
18
Unspecified
Terminal
right
Analog
14
IN_P2
19
Unspecified
Terminal
right
Analog
13
AGND_R
20
Unspecified
Terminal
bottom
Ground
39
AVCC_R
21
Unspecified
Terminal
top
Power
3
VREF_R
22
Unspecified
Terminal
top
Power
5
CHIP_EN
23
Unspecified
Terminal
right
Control
16

ES9822QPRO