Part Audit Review


I’ll audit the part metadata, locate and attach the official datasheet if needed, then verify the symbol, footprint, and pin descriptions against it.
The symbol exposes 25 terminals (24 package pins plus the exposed ground pad). I’m now checking the part-level properties and physical pad geometry against Silicon Labs’ package data.
Created a project doc

Part Audit

View Document

Part Audit Scope
Audit of CP2102C-A01-GQFN24 metadata, schematic symbol, PCB footprint, and terminal descriptions against the official Silicon Labs CP2102C datasheet (Rev. 1.0): https://www.silabs.com/documents/public/data-sheets/cp2102c-datasheet.pdf
Part metadata Key verified specifications
  • USB 2.0 full-speed device, 12 Mbps, with integrated transceiver, matching/pull-up resistors, and 48 MHz oscillator.
  • UART rates from 300 baud to 3 Mbaud; 5–8 data bits, common parity modes, 1/1.5/2 stop bits, and hardware handshaking.
  • VDD operating range: 3.0–3.6 V. VIO: 1.71 V to VDD. VREGIN: 3.0–5.25 V.
  • Typical current: 9.5 mA at 115200 baud and 13.7 mA at 3 Mbaud, plus USB pull-up current; suspend current is 195 µA.
Audit complete. The datasheet property was already populated, so it was not changed; I verified against the official Silicon Labs datasheet.
Key flags: incorrect TO package metadata, unspecified pin types/missing descriptions, oversized exposed pad with excessive paste coverage, and inaccurate claims about configuration and battery-charger detection. The 25-terminal pin mapping is correct.
Full findings: Part Audit
Suggested next steps
  1. Correct the package and description properties.
  2. Add terminal electrical types and pin descriptions.
  3. Repair the exposed-pad copper/paste geometry before production.
Fix metadata and footprint
Update part description
Review paste geometry
Add VBUS guidance

SUSPEND
Pin Number
17
RI
Pin Number
1
TXD
Pin Number
21
NC_6
Pin Number
16
RXD
Pin Number
20
NC_1
Pin Number
10
DCD
Pin Number
24
VBUS
Pin Number
8
RTS
Pin Number
19
GND_1
Pin Number
2
DTR
Pin Number
23
NC_4
Pin Number
13
RSTB
Pin Number
9
D+
Pin Number
3
CTS
Pin Number
18
NC_5
Pin Number
14
DSR
Pin Number
22
VDD
Pin Number
6
GND_2
Pin Number
25
VIO
Pin Number
5
NC_2
Pin Number
11
SUSPENDB
Pin Number
15
VREGIN
Pin Number
7
D-
Pin Number
4
NC_3
Pin Number
12
Part Audit
Scope
Audit of CP2102C-A01-GQFN24 metadata, schematic symbol, PCB footprint, and terminal descriptions against the official Silicon Labs CP2102C datasheet (Rev. 1.0): https://www.silabs.com/documents/public/data-sheets/cp2102c-datasheet.pdf
Part metadata

Table


FieldCurrent valueReview
MPNCP2102C-A01-GQFN24Correct; listed ordering code for the industrial-temperature QFN24 variant.
ManufacturerSilicon LabsCorrect.
Part typeIntegrated CircuitsAcceptable but generic.
Designator prefixICAcceptable.
Pin/terminal count25Correct when counting 24 perimeter pins plus the exposed center GND pad.
Package or Case CodeTOIncorrect. This is a 4 × 4 mm QFN24, not a TO package.
DatasheetExisting uploaded PDF URLPresent, so no property update was required. The official manufacturer URL is listed above.
DescriptionProject description text only; no dedicated indexed description propertyAdd a concise dedicated description if desired: “USB 2.0 full-speed CDC USB-to-UART bridge, 3 Mbaud, QFN24, separate VIO.”
Key verified specifications
  • USB 2.0 full-speed device, 12 Mbps, with integrated transceiver, matching/pull-up resistors, and 48 MHz oscillator.
  • UART rates from 300 baud to 3 Mbaud; 5–8 data bits, common parity modes, 1/1.5/2 stop bits, and hardware handshaking.
  • VDD operating range: 3.0–3.6 V. VIO: 1.71 V to VDD. VREGIN: 3.0–5.25 V.
  • Typical current: 9.5 mA at 115200 baud and 13.7 mA at 3 Mbaud, plus USB pull-up current; suspend current is 195 µA.
  • Industrial ambient range: −40 to +85 °C. Pb-free/RoHS-compliant ordering variant.
  • 4 × 4 mm QFN24, 0.50 mm pitch, nominal 0.75 mm height, exposed ground pad.
  • Standard OS CDC driver; no custom VCP driver or firmware is required.
  • CP2102C does not support customizing the device configuration.
  • Product selection table does not list Battery Charger Detect for CP2102C-A01-GQFN24.
Symbol and pin-map review
The symbol pin numbers and names match the QFN24 pinout:
1 RI; 2 GND; 3 D+; 4 D−; 5 VIO; 6 VDD; 7 VREGIN; 8 VBUS; 9 RSTb; 10–14 NC; 15 SUSPENDb; 16 NC; 17 SUSPEND; 18 CTS; 19 RTS; 20 RXD; 21 TXD; 22 DSR; 23 DTR; 24 DCD; center pad 25 GND.
Symbol issues
  • All terminal Pin Type properties are “Unspecified.” They should be classified to improve ERC:
    • Power input/output: VIO, VDD, VREGIN
    • Ground: pins 2 and 25
    • USB bidirectional: D+, D−
    • Inputs: RI, VBUS, RSTB, CTS, RXD, DSR, DCD
    • Outputs: SUSPENDB, SUSPEND, RTS, TXD, DTR
    • No-connect: pins 10–14 and 16
  • Pin descriptions are absent. Add the datasheet functions, including active-low behavior for RI, RSTb, CTS, RTS, DSR, DTR, DCD, and SUSPENDb.
  • The schematic uses RSTB/SUSPENDB; this is electrically correct, though displaying an overbar or /RST, /SUSPEND would communicate active-low semantics more clearly.
Footprint review
Current footprint asset: QFN50P400X400X80-25N-D.kicad_mod.
Correct items
  • 4.00 × 4.00 mm package outline.
  • 24 perimeter pads plus center pad.
  • 0.50 mm perimeter pitch.
  • Perimeter pad width 0.30 mm.
  • Pin numbering and pad-to-terminal mapping match the symbol.
Mismatches and manufacturability concerns

Table


FeatureDatasheet land patternCurrent footprintAssessment
Perimeter pad0.30 × 0.85 mm0.30 × 0.80 mmMinor mismatch: 0.05 mm shorter than recommended.
Center exposed-pad land2.55 × 2.55 mm2.80 × 2.80 mmMismatch: 0.25 mm larger per axis than recommended and larger than the package’s 2.35–2.55 mm exposed-pad range.
Center-pad paste2 × 2 array of 0.9 mm apertures on 1.2 mm pitchOne solid 2.80 × 2.80 mm paste openingSignificant issue: excessive paste can float the package and cause voiding/bridging.
NSMD mask clearanceMinimum 0.06 mm around padsNot explicitly defined in imported footprintVerify generated mask expansion before manufacturing.
Stencil thickness0.125 mm recommendedNot represented in footprintManufacturing note, not a footprint defect.
The footprint’s body size, pitch, and numbering are usable, but the exposed-pad copper and especially paste geometry should be corrected before production.
Description/property mismatches
The current project description includes claims that do not match the official CP2102C-A01-GQFN24 datasheet:
  • “Simple GUI-based configurator” — incorrect. The datasheet explicitly states there is no support for customizing device configuration.
  • “USB Battery Charger Detection (USB BCS 1.2)” — incorrect for this ordering variant. The product selection table shows no Battery Charger Detect support.
  • “Royalty-free Virtual COM port drivers” — misleading/outdated wording. This device uses standard OS USB CDC drivers and needs no custom driver.
  • “Remote wakeup for waking a suspended host” — not clearly specified as a user-controlled feature. The datasheet documents USB suspend/resume behavior and says resume signaling may be detected or generated, but does not present a dedicated remote-wakeup control input/function in the feature list.
Additional integration note
The VBUS sense pin must not normally be connected directly to 5 V. Silicon Labs shows a 47.5 kΩ / 22.1 kΩ resistor divider so the pin meets both its input-high requirement and voltage limits. USB ESD protection is also recommended.
Overall result
  • Pin mapping: Pass.
  • Terminal count: Pass (24 pins + exposed pad).
  • Package metadata: Fail (TO must be QFN24).
  • Symbol electrical types/descriptions: Incomplete.
  • Footprint: Needs exposed-pad copper/paste correction; perimeter pads are slightly short.
  • Marketing description: Contains multiple inaccurate or unsupported feature claims.
  • Scope

  • Part metadata

  • Key verified specifications

  • Symbol and pin-map review

  • Symbol issues

  • Footprint review

  • Correct items

  • Mismatches and manufacturability concerns

  • Description/property mismatches

  • Additional integration note

  • Overall result