Review all available part information (MPN, package, pin count, description, properties). If no datasheet URL is already set, search the web for the official datasheet and update the part's Datasheet property with the URL. Then cross-check the schematic symbol, footprint, and pin descriptions against the datasheet. Summarize key specs and flag any mismatches.
I’ll inspect the part metadata, look up the official datasheet if needed, update the Datasheet property when missing, then compare symbol/footprint/pins against the source and report mismatches.
Reviewed the part against the TI SN74LVC1G175-EP datasheet and created the full report here: CLVC1G175MDCKREP Part Review.
Key findings: pin numbers/functions match the datasheet, the Datasheet URL was already present, and the package/pin count align with DCK/SC70-6. Main flags are unspecified pin types, missing pin descriptions, a symbol that doesn’t visually show flip-flop behavior, and footprint pad geometry that appears larger than TI’s example land pattern and should be reviewed before manufacturing.
Reviewed the published Flux part project silicon-yard/clvc1g175mdckrep for part metadata, datasheet availability, schematic terminals, footprint pads, and pin descriptions.
Official TI datasheet found by web search: https://www.ti.com/lit/ds/symlink/sn74lvc1g175-ep.pdf
Official TI part-details page found by web search: https://www.ti.com/product/SN74LVC1G175-EP/part-details/CLVC1G175MDCKREP
Note: the project already had a Datasheet URL set, so no Datasheet property update was required by the user's condition. The existing URL appears to be an uploaded copy of the TI datasheet rather than the direct TI URL.
Available Flux Part Information
Project-level properties
Table
Field
Current value
Datasheet / source check
Project name
CLVC1G175MDCKREP
Matches orderable part number
Description
Enhanced Product Single D-Type Flip-Flop With Asynchronous Clear
Matches datasheet function
Designator Prefix
IC
Appropriate for logic IC
Manufacturer Part Number
CLVC1G175MDCKREP
Matches TI orderable part number
Manufacturer Name
Texas Instruments
Matches datasheet
Datasheet URL
Uploaded PDF URL
Present; official direct TI URL also found
Pad count
6
Matches DCK / SC70 6-pin package
Schematic terminals inspected
Table
Terminal
Current pin number
Current pin type
Datasheet function
Check
CLK
1
Unspecified
Clock input, rising-edge triggered
Pin number/name match; pin type should be Input/Clock
GND
2
Unspecified
Ground
Pin number/name match; pin type should be Power/Ground
D
3
Unspecified
Data input
Pin number/name match; pin type should be Input
Q
4
Unspecified
Data output
Pin number/name match; pin type should be Output
VCC
5
Unspecified
Positive supply
Pin number/name match; pin type should be Power
~CLR
6
Unspecified
Active-low asynchronous clear input
Pin number/function match; name uses active-low notation; pin type should be Input
Datasheet Key Specs
Device family/title: SN74LVC1G175-EP, single D-type flip-flop with asynchronous clear.
Orderable MPN: CLVC1G175MDCKREP.
Package: DCK, SC70/SOT, 6 pins, TI package drawing DCK0006A.
Supply range: 1.65 V to 5.5 V operating; 1.5 V data retention.
Input voltage tolerance: inputs accept 0 V to 5.5 V over recommended conditions.
Temperature range: -55 °C to 125 °C.
Logic behavior: when CLR is high, D transfers to Q on rising CLK edge; when CLR is low, Q is forced low asynchronously.
Output drive: up to ±24 mA at 3.3 V, ±32 mA at 4.5 V in recommended operating conditions.
Max clock frequency: 100 MHz at 1.8 V, 125 MHz at 2.5 V, 150 MHz at 3.3 V, 175 MHz at 5 V.
Propagation delay: max 8 ns at 3.3 V, max 5 ns at 5 V for CLK/CLR to Q in listed switching conditions.
ESD ratings: HBM 2000 V, MM 200 V, CDM 1000 V.
MSL / reflow: Level 1, 260 °C unlimited per TI package data.
Top-side marking: BUD.
Symbol Cross-check
Pinout match
The schematic terminal names and numbers match the datasheet DCK top-view pinout:
CLK
GND
D
Q
VCC
CLR
Symbol quality flags
All terminal Pin Type properties are currently Unspecified. This is a metadata quality mismatch against the datasheet functions and can reduce ERC usefulness.
Pin descriptions are not populated beyond the terminal designator names. Recommended descriptions: Clock input, Ground, Data input, Flip-flop output, Positive supply, and Active-low asynchronous clear input.
The symbol is represented as six terminals rather than a conventional flip-flop symbol with a clock-edge marker and active-low clear bubble. This is not an electrical pinout mismatch, but it is a readability/usability issue.
Footprint Cross-check
Footprint information inspected
Footprint asset: F_SOT65P210X110-6N.kicad_mod
Footprint description: DCK (R-PDSO-G6)
Pads: 6 SMD rectangular pads
Pad pitch: 0.65 mm between adjacent pins on each side
Pad centers: ±0.95 mm across the body, with y positions at ±0.65 mm and 0 mm
Pad size in KiCad asset: 0.4 mm × 1.2 mm, rotated 90°
3D model asset present: CLVC1G175MDCKREP.stp
Footprint pin-number orientation
The footprint pad numbering corresponds to the datasheet DCK 6-pin top-view order: pins 1/2/3 on one side and pins 4/5/6 on the opposite side. The terminal-to-pad mapping matches the datasheet pin functions.
Footprint geometry flags
The footprint has six pads at 0.65 mm pitch, matching DCK/SC70 pin count and pitch.
The TI DCK0006A example land pattern lists 6× pads of 0.9 mm length × 0.4 mm width with an overall pad span/reference of 2.2 mm.
The current KiCad footprint uses 0.4 mm × 1.2 mm pads rotated 90°. Interpreted in the usual KiCad geometry, this makes the pad long dimension 1.2 mm across the leads, longer than TI's 0.9 mm example. With centers at ±0.95 mm, the resulting outer pad span may also be larger than the TI example.
Because IPC-7351 alternate designs are allowed by the TI drawing, this is not automatically a fatal mismatch, but it should be reviewed against the intended assembly house land-pattern rules.
Fab outline is minimal and does not draw a complete body outline; pin-1 marker exists as a very short silk line. This is acceptable electrically but weak for visual assembly orientation.
Mismatch / Issue Summary
Datasheet URL: Present, but stored as an uploaded PDF copy rather than the direct official TI URL. No update was performed because the Datasheet URL was not missing.
Pin types: All six schematic terminals are Unspecified; they should be typed according to datasheet function.
Pin descriptions: No detailed pin descriptions are present; adding them would improve part quality and ERC clarity.
Symbol readability: Electrical pinout is correct, but the symbol does not visually communicate flip-flop behavior, rising-edge CLK, or active-low CLR except via ~CLR naming.
Footprint geometry: Pin count, pitch, and pin mapping match; pad length/span appear larger than TI's example land pattern and should be reviewed if exact TI recommended land pattern compliance is required.
Footprint visual aids: Minimal fab outline and weak pin-1 silk marker; not an electrical mismatch, but a part quality improvement opportunity.
Recommended Fixes
Update terminal pin types:
CLK: Input or Clock/Input if supported
GND: Power/Ground
D: Input
Q: Output
VCC: Power
~CLR: Input
Add pin descriptions matching the datasheet pin functions.
Consider replacing the symbol with a conventional D flip-flop symbol showing a clock-edge marker on CLK and active-low clear indication.
Consider updating the Datasheet URL to the official TI direct PDF URL if project policy prefers manufacturer-hosted URLs.
Review the footprint against TI DCK0006A land-pattern dimensions or the target assembler's IPC-7351 profile before publication/use in manufacturing.