ATWILC3000 Pin Review

adrian95

adrian95

  • Make the functional group more general.
  • Add a Section property to all pins, and apply the same value used in the Pin Group property to each pin's Section property.
Assign a Terminal Order from 1 to 10, starting with Power. Power should be Terminal Order 1, and Ground should be last, Terminal Order 10. For Orientation, set Power to "Top" and Ground to "Bottom." For the remaining sections/groups, you may decide the Terminal Order and Orientation yourself. For Orientation, distribute them between "Left" and "Right" — don't put everything on one side. Each group/section should have a different orientation.

flux

I’ll generalize the pin groups, mirror each group into Section, and rebalance Terminal Order/Orientation with Power at top/order 1 and Ground bottom/order 10.

flux

Updated all pins as requested.
Open items:
  • None for this grouping pass.
  • Existing pin-description note remains: pin 34/35 labels still appear swapped versus the datasheet, but I did not rename pins because this request was only for grouping/section/order/orientation.
Suggested next steps:
  1. Rename/swap pin 34 and pin 35 labels to match the datasheet.
  2. Rename pin 37 to PADDLE or PADDLE/VSS.
  3. Review the generated symbol visually and adjust left/right balance if you want a different layout.
Fix pin labels
Swap GPIO labels
Rename paddle pin
Normalize SD pin
Review symbol layout
BT_RXD
Pin Number
9
GPIO18
Pin Number
30
IRQN
Pin Number
33
GND_6
Pin Number
37
GPIO0
Pin Number
34
SDIO/SPI_CFG
Pin Number
2
GND_1
Pin Number
1
CHIP_EN
Pin Number
19
GPIO4
Pin Number
15
GPIO19
Pin Number
31
N/C_2
Pin Number
4
GND_4
Pin Number
28
GPIO3
Pin Number
14
BT_TXD
Pin Number
8
GND_5
Pin Number
36
RESETN
Pin Number
7
GPIO20
Pin Number
32
UART_TXD
Pin Number
16
BT_CTS/I2C_SCL_S
Pin Number
11
GND_2
Pin Number
13
SD_CLK/GPIO8
Pin Number
22
SD_DAT3/GPIO7
Pin Number
27
SD_DAT1/SPI_SSN
Pin Number
25
GPIO21
Pin Number
35
GND_3
Pin Number
21
SD_DAT2/SPI_MOSI
Pin Number
26
GPIO17
Pin Number
29
RTC_CLK
Pin Number
20
N/C_3
Pin Number
5
BT_RTS/I2C_SDA_S
Pin Number
10
N/C_1
Pin Number
3
SD_DAT0/SPI_MISO
Pin Number
24
VDDIO
Pin Number
12
UART_RXD
Pin Number
17
VBAT
Pin Number
18
SD_CMD_SPI_SCK
Pin Number
23
N/C_4
Pin Number
6

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ATWILC3000-MR110CA Part Review
Date: 2026-07-23
Datasheet Source
  • Official Microchip datasheet used for review: ATWILC3000 Wi-Fi® Link Controller Module Data Sheet, DS70005327
  • The part already had a readable datasheet URL set for the self datasheet lookup. The lookup reported a URL-quality issue because the stored URL uses HTTP and suggested HTTPS: https://www.microchip.com/mymicrochip/filehandler.aspx?ddocname=en590095.
Available Part Information Reviewed
  • Project / part name: ATWILC3000-MR110CA
  • Manufacturer: Microchip Technology
  • MPN / ordering code: ATWILC3000-MR110CA
  • Description: ATWILC3000 Wi-Fi link controller module with Bluetooth 5.0 and integrated chip antenna
  • Package / module size: 22.43 mm × 14.73 mm, total thickness 2.09 mm
  • Pads: 37 total, including exposed paddle / VSS ground pad
  • Pad pitch: 1.20 mm
  • Pad width: 0.81 mm
  • Exposed pad: 4.4 mm × 4.4 mm
  • Mount: castellated/module-style SMD pads plus exposed paddle
Key Electrical / RF Specs
  • Wi-Fi: IEEE 802.11 b/g/n, 1×1, 20 MHz bandwidth, 2.4 GHz ISM, up to 72 Mbps PHY
  • Wi-Fi frequency: 2412–2472 MHz
  • Bluetooth: Bluetooth 5.0 / BLE, 2402–2480 MHz
  • VDDIO recommended ranges:
    • Low: 1.62–2.00 V, typ. 1.80 V
    • Mid: 2.00–3.00 V, typ. 2.50 V
    • High: 3.00–3.60 V, typ. 3.30 V
  • VBAT recommended range: 2.5–4.2 V, typ. 3.30 V; optimal RF performance for 3.0–4.2 V
  • Operating temperature: -40°C to +85°C
  • Absolute maximum: VDDIO and VBAT -0.3 V to 5.0 V; digital inputs -0.3 V to VDDIO; storage -65°C to +150°C; junction 125°C max; RF input power 10 dBm max
  • Example current draw at VBAT = 3.3 V, VDDIO = 3.3 V, 25°C:
    • Wi-Fi TX: up to about 281 mA VBAT plus 23.9 mA VDDIO depending on mode/rate
    • Wi-Fi RX: about 60.5 mA VBAT plus 23.6 mA VDDIO
    • BLE TX 1 Mbps: about 98.6 mA VBAT plus 2.5 mA VDDIO
    • BLE RX 1 Mbps: about 69.1 mA VBAT plus 2.5 mA VDDIO
    • Doze / BLE low-power: about 1.4 mA total
    • Power-down: about 1.25 µA total
Symbol / Pinout Cross-Check
The project has 37 schematic terminal components and the PCB footprint has 37 pad nodes, matching the datasheet pad count. Pin descriptions were populated from the datasheet and each pin was assigned to exactly one primary functional group.
Flagged Mismatches
  1. Pin 34 / Pin 35 label swap
    • Datasheet Table 3-1: pin 34 = GPIO21, pin 35 = GPIO0.
    • Current project before correction/grouping: pin 34 terminal is labeled GPIO0; pin 35 terminal is labeled GPIO21.
    • I did not rename the terminals in this pass; I added pin descriptions that explicitly flag the mismatch on both pins.
  2. Pin 23 label formatting
    • Datasheet label: SD_CMD/SPI_SCK.
    • Current project terminal: SD_CMD_SPI_SCK.
    • Function is otherwise represented correctly; this is a naming/format consistency issue, not an electrical pin-number mismatch.
  3. Pin 37 exposed paddle naming
    • Datasheet label: PADDLE, type VSS Power, connect to system-board ground.
    • Current project terminal: GND_6.
    • Electrical function is correct as ground, but the symbol/footprint naming hides that this pad is the exposed paddle.
  4. Datasheet URL quality
    • A datasheet is already set and readable, so the “no datasheet URL” condition was not met.
    • The stored URL appears to use HTTP; the datasheet lookup suggested the HTTPS version.
Footprint Cross-Check
  • Pad count matches: 37 pads.
  • The body/silkscreen outline corresponds to approximately 22.43 mm × 14.73 mm, matching the datasheet package size.
  • The exposed paddle pad is present and is approximately 4.4 mm × 4.4 mm, matching the datasheet.
  • Peripheral pad pitch and pad width appear consistent with the datasheet nominal values. The raw layout output displayed small decimal values for pad positions/sizes, but the outline and pad pattern align with the expected scaled geometry.
Functional Pin Groups Applied
Each physical pin was assigned to exactly one group; no pin was duplicated across groups.

Table

GroupPins
Power12 VDDIO, 18 VBAT
Ground1 GND_1, 13 GND_2, 21 GND_3, 28 GND_4, 36 GND_5, 37 GND_6 / exposed paddle
Control2 SDIO/SPI_CFG, 7 RESETN, 19 CHIP_EN, 33 IRQN
Clock20 RTC_CLK
Bluetooth UART / Debug I2C8 BT_TXD, 9 BT_RXD, 10 BT_RTS/I2C_SDA_S, 11 BT_CTS/I2C_SCL_S
Wi-Fi Debug UART16 UART_TXD, 17 UART_RXD
SDIO/SPI Interface22 SD_CLK/GPIO8, 23 SD_CMD_SPI_SCK, 24 SD_DAT0/SPI_MISO, 25 SD_DAT1/SPI_SSN, 26 SD_DAT2/SPI_MOSI, 27 SD_DAT3/GPIO7
GPIO14 GPIO3, 15 GPIO4, 29 GPIO17, 30 GPIO18, 31 GPIO19, 32 GPIO20, 34 GPIO0 currently labeled but datasheet says GPIO21, 35 GPIO21 currently labeled but datasheet says GPIO0
No Connect3 N/C_1, 4 N/C_2, 5 N/C_3, 6 N/C_4
Applied Property Updates
  • Added Pin Group and matching Section to every terminal.
  • Added Pin Description to every terminal based on the datasheet.
  • Normalized Pin Type to Flux standard options:
    • Power supplies: Power In
    • Grounds / exposed paddle: Ground
    • No-connect pins: Not Connected
    • Digital inputs: Input
    • Interrupt output: Output
    • Digital I/O pins: Bi-Directional
  • Set broad symbol organization metadata:
    • Power: terminal order 1, orientation Top
    • Ground: terminal order 10, orientation Bottom
    • Other groups distributed Left/Right by function
  1. Rename/swap the pin 34 and pin 35 terminal labels so the symbol matches the datasheet exactly: pin 34 should be GPIO21; pin 35 should be GPIO0.
  2. Consider renaming pin 23 from SD_CMD_SPI_SCK to SD_CMD/SPI_SCK for consistency with the datasheet and the other slash-form signal labels.
  3. Consider renaming pin 37 from GND_6 to PADDLE or PADDLE/VSS while keeping its group as Ground, so the exposed-paddle requirement is visually obvious.
  4. If the platform exposes direct part-level datasheet editing, update the stored datasheet URL from HTTP to HTTPS.

  • Datasheet Source

  • Available Part Information Reviewed

  • Key Electrical / RF Specs

  • Symbol / Pinout Cross-Check

  • Flagged Mismatches

  • Footprint Cross-Check

  • Functional Pin Groups Applied

  • Applied Property Updates

  • Recommended Next Fixes

Documents

Assets

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ATWILC3000-MR110CA

ATWILC3000-MR110CA

ATWILC3000-MR110CA.stp3D Model

ATWILC3000-MR110CA

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ATWILC3000-MR110CA

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ATWILC3000-MR110CA

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Wi-Fi® + Bluetooth® 5.0 RF Module – 2.4 GHz IEEE 802.11b/g/n and Bluetooth® 5.0 RF transceiver module with an integrated chip antenna for IoT, industrial automation, smart home, medical, and embedded wireless connectivity. Operates from a 1.62 V to 3.6 V supply, supports Wi-Fi data rates up to 72.2 Mbps (802.11n), +19 dBm transmit power, and −98 dBm receiver sensitivity. Features SPI, SDIO, UART, and I²C host interfaces, integrated power amplifier (PA), low-noise amplifier (LNA), power management circuitry, and supports WEP, WPA, WPA2, Wi-Fi Direct®, SoftAP, and Bluetooth BR/EDR + BLE. Specified for operation over a −40°C to +85°C temperature range and housed in a surface-mount certified RF module (22.4 × 14.7 × 2.0 mm).
#Microchip #ATWILC3000MR110CA #ATWILC3000 #WiFiModule #Bluetooth5 #80211bgn #RFModule #WirelessConnectivity #IoT #SPI #SDIO #UART #BLE #EmbeddedSystems

Properties

ATWILC3000-MR110CA

Microchip

Integrated Circuit

microchip.com/mymicrochip/filehandler.aspx?ddocname=en590095

IC

Module

parametric-v1

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