Part Audit Review


Organized all 56 terminals into eight groups: Power, Antenna/RF, Control/Debug, Clock, NFC, USB, GPIO, and Ground.
  • Section matches Pin Group on every terminal.
  • Power is Top; Ground is Bottom; other groups are consistently Left or Right.
  • Terminal orders are unique and deterministic within each group.
  • Pin numbers, names, electrical types, and footprint mappings were preserved and verified.
Check this schematic component against the datasheet for [MPN] and assign the correct pin orientation, section, and terminal order without changing, replacing, renumbering, or remapping any pins. Remove the Pin Group property from all pins if it exists. Place Power pins first and Ground pins last. Within each section, distribute the pins as evenly as possible between the left and right sides; for example, split 10 pins as 5/5 and 11 pins as 5/6 or 6/5. If a section contains only one pin, leave it on the most appropriate side. Keep the symbol compact, balanced, and visually symmetrical. If a pin function is unclear, assign Unclear / Check datasheet, then apply all changes directly to the schematic component.
I’ll re-check the ANNA-B402-00B pin table, remove Pin Group from every terminal, then assign datasheet-based sections, balanced left/right orientations, and deterministic ordering with Power first and Ground last—without altering any pin identity or mapping.
Updated all 56 ANNA-B402-00B terminals against the official u-blox datasheet.
  • Removed Pin Group from every pin.
  • Assigned datasheet-based sections and globally unique orders 1–56.
  • Power is first; Ground is last.
  • Balanced orientations exactly 28 Left / 28 Right.
  • Preserved all pin names, numbers, types, positions, and footprint mappings.
  • No unclear pin functions were found.
Fix symbol metadata
Add pin descriptions
Correct ground types
Run symbol review
Update audit notes

GND
Pin Number
55
RESET_N
Pin Number
12
XL1/GPIO_17
Pin Number
17
GND
Pin Number
8
USBDM
Pin Number
35
GPIO_40
Pin Number
40
GPIO_51
Pin Number
51
GPIO_31
Pin Number
31
GPIO_19
Pin Number
19
GPIO_48
Pin Number
48
GPIO_13
Pin Number
13
ANT_PCB
Pin Number
1
GPIO_10
Pin Number
10
ANT_GND2
Pin Number
3
GPIO_14
Pin Number
14
VCC
Pin Number
9
GPIO_24
Pin Number
24
ANT_INT
Pin Number
5
GPIO_27
Pin Number
27
GPIO_20
Pin Number
20
ANT
Pin Number
6
GND
Pin Number
4
USBDP
Pin Number
34
GND
Pin Number
46
GND
Pin Number
53
SWDCLK
Pin Number
41
ANT_GND1
Pin Number
2
GND
Pin Number
54
GND
Pin Number
56
GPIO_52
Pin Number
52
GPIO_28
Pin Number
28
GND
Pin Number
45
GPIO_32
Pin Number
32
GPIO_15
Pin Number
15
NFC1/GPIO_22
Pin Number
22
GPIO_33
Pin Number
33
GPIO_49
Pin Number
49
XL2/GPIO_18
Pin Number
18
GPIO_39
Pin Number
39
GPIO_26
Pin Number
26
GND
Pin Number
7
GPIO_36
Pin Number
36
GPIO_50
Pin Number
50
GPIO_47
Pin Number
47
GPIO_38
Pin Number
38
SWDIO
Pin Number
42
GND
Pin Number
44
NFC2/GPIO_23
Pin Number
23
SWO/GPIO_16
Pin Number
16
GPIO_29
Pin Number
29
GND
Pin Number
43
VBUS
Pin Number
21
GPIO_37
Pin Number
37
GPIO_25
Pin Number
25
GPIO_30
Pin Number
30
GPIO_11
Pin Number
11
ANNA-B402-00B Part Audit
Official documentation
The Datasheet URL property was missing and has now been populated. Flux ingested and stored a mirrored PDF URL; the official manufacturer source is listed above.
Part metadata review
  • MPN: ANNA-B402-00B — correct
  • Manufacturer: u-blox — correct
  • Part type: Module — correct
  • Pin count: 56 — correct
  • Package/body: 56-terminal SiP/PIM, 6.5 x 6.5 x 1.2 mm
  • Description: technically consistent overall, but contains duplicated wording (“Bluetooth Bluetooth v5.1”).
Metadata findings
  • Medium: No explicit canonical Package / Package or Case Code property is set.
  • Low: Description has duplicated wording.
  • Low: Product Info URL and System Integration Manual URL are not separately recorded.
Key specifications
  • Nordic nRF52833, Arm Cortex-M4F, 64 MHz
  • 512 kB flash, 128 kB RAM
  • Bluetooth 5.1 Low Energy; IEEE 802.15.4 / Thread / Zigbee-capable; proprietary 2.4 GHz
  • BLE PHY: 2 Mbps, 1 Mbps, 500 kbps, 125 kbps
  • VCC: 1.7–3.6 V; 3.3 V typical; 3.9 V absolute maximum
  • VBUS: 5 V for USB operation
  • Temperature: -40 to +105 °C
  • Conducted TX power: +8 dBm typical
  • Sensitivity: -94 dBm at 1 Mbps; -103 dBm at 125 kbps
  • Internal or external antenna support; ANT nominally 50 ohms
  • Body: 6.5 x 6.5 x 1.2 mm
  • 56 terminals, 0.650 mm nominal pitch
  • Nominal lands: 0.350 x 0.350 mm; center exposed ground lands 0.420 x 0.420 mm
Schematic symbol and terminals
All pins 1–56 are present exactly once. Pin names and numbering match Table 4 of the data sheet, including antenna, VCC/VBUS, GPIO, USB, NFC, SWD, and center GND pads.
Mismatches
  • High: All 56 terminals lack Pin Description properties. Important omitted guidance includes antenna configuration, supply ranges, active-low reset, crystal requirements, analog-capable GPIOs, USB VBUS requirements, NFC restrictions, restricted-drive pins, and the requirement to connect exposed pads 53–56 to ground.
  • Medium: Ground terminals are typed Power Out; ground/passive classification would more accurately model their behavior.
  • Low: ANT_GND1 and ANT_GND2 are typed as power outputs, although they are placement-dependent antenna counterpoise connections.
No terminal name, number, or other direction mismatch was found.
PCB footprint
The footprint contains 56 continuously numbered rectangular SMD pads, correct 0.650 mm row pitch, center pads 53–56 in a 2x2 arrangement, a pin-1 marker, and package/fabrication outlines matching the 6.5 mm body.
Mismatches
  • High: No antenna copper/trace/ground-plane/placement keepout geometry is encoded. The integration manual requires the selected certified antenna reference layout to be followed, including all-layer trace restrictions in the applicable antenna clearance region.
  • Medium: The footprint is package-only and does not encode the required antenna interconnections for corner, side, internal-antenna, or external-antenna configurations.
  • Low: Standard pads are 0.3556 mm rather than nominal 0.350 mm (+0.0056 mm).
  • Low: Center pads are 0.4318 mm rather than nominal 0.420 mm (+0.0118 mm).
  • Low: Fabrication outline is approximately 6.5024 mm rather than 6.500 mm; this is within the body tolerance.
  • Low: No explicit component-height/courtyard metadata is encoded, although a STEP model is attached.
No missing, duplicate, incorrectly numbered, or grossly misplaced pads were found.
Overall disposition
The part is electrically and mechanically recognizable and its pin numbering and core pad arrangement agree with official documentation. The principal issues are missing terminal descriptions and missing antenna integration keepouts/guidance. Before using the internal antenna in a product PCB, apply the exact reference-layout and keepout rules from the ANNA-B4 System Integration Manual.
Antenna keepout and reference-layout guidance
Source: u-blox ANNA-B4 System Integration Manual, UBX-21000517 R08, especially the antenna reference-design and placement sections. The module footprint alone is not a complete certified antenna implementation; the host PCB must reproduce the applicable u-blox reference layout.
Select one antenna configuration
  • Internal antenna, corner placement: Place the module at the host-PCB corner in the orientation shown by u-blox. Keep the antenna strip at the board edge. Do not place copper pours, traces, vias, components, metal shields, batteries, displays, cables, or enclosure metal in the documented antenna clearance volume. The trace prohibition applies on every copper layer beneath the antenna clearance region.
  • Internal antenna, side placement: Use only the side-placement reference arrangement and its specified ground-plane/clearance geometry. Do not assume the corner keepout can be rotated or translated without preserving all reference dimensions.
  • External antenna: Route the ANT terminal as a nominal 50-ohm controlled-impedance RF connection using the reference matching/connection topology. Keep the route short, avoid stubs and abrupt geometry changes, maintain continuous RF ground, and place matching components at the positions shown by the reference design.
  • ANT_PCB, ANT_GND1, ANT_GND2: Their connections depend on the selected certified reference arrangement; treat them as RF/antenna-layout terminals, not ordinary ground pins.
  • ANT_INT and ANT: Connect only as shown for the selected internal- or external-antenna implementation. Do not improvise a generic short between them.
  • GND and exposed pads 53–56: Connect to the host ground system with low inductance and ground vias consistent with the integration manual.
PCB implementation checklist
  1. Choose corner, side, or external-antenna configuration before board placement and routing.
  2. Copy the corresponding u-blox reference dimensions from the current integration-manual revision into board-level keepout rules.
  3. Apply the antenna keepout to all copper layers, component placement, vias, and mechanical metal where specified.
  4. Preserve the reference ground-plane edge, module-to-board-edge relationship, and antenna orientation.
  5. Keep switching regulators, clocks, high-speed buses, displays, batteries, cables, and large metal objects away from the antenna region.
  6. For external antennas, enforce 50-ohm routing and provide the reference matching network and RF test access if required.
  7. Re-evaluate RF performance and regulatory approvals if the reference layout, enclosure, host-board size, nearby metal, or antenna configuration changes.
Footprint policy
Do not bake a single fixed antenna keepout into this reusable package footprint unless it is explicitly labeled for one u-blox reference configuration. The safer reusable-part approach is to keep the package land pattern generic and add the exact antenna keepout at the host-board level after the antenna configuration and module placement are known.
  • Official documentation

  • Part metadata review

  • Metadata findings

  • Key specifications

  • Schematic symbol and terminals

  • Mismatches

  • PCB footprint

  • Mismatches

  • Overall disposition

  • Antenna keepout and reference-layout guidance

  • Select one antenna configuration

  • Antenna-related terminals

  • PCB implementation checklist

  • Footprint policy