Arranged all 74 components into eight readable functional blocks, with local wires, inter-block net labels, and cleaned-up power symbols and label spacing. Verified that all 47 nets, component values, and pin connections are unchanged; no PCB edits were made.
Three clear, non-junction UART crossings remain. Pre-existing electrical-check findings were left untouched; electrical review is the next step before PCB layout.
Partial electrical capture, not a verified schematic or manufacturing-ready board. Execution stopped because ACUs ran out. User's latest explicit correction: MCU must be STM32F756ZGT6. The captured U1 remains STM32F756VGT6 per the build report; do not claim replacement occurred.
Confirmed Requirements
24 V nominal input, Molex Micro-Fit 3.0 two-pin; parallel Hi-Link K7805-2000RL 5 V supply and LMR50410XDBVR 3.3 V supply directly from 24 V. MCP9808 I²C; eight onboard LED outputs; three MOSFET on/off controls; three protected 3.3 V UARTs for UM982 and two TF-02 Pro devices. Power MOSFET stages must wait for load specifications.
Reported Captured State
67 components, 48 nets, 11 functional groups. Component metadata contains source references. Capture only: no drawn wires, no deliberate symbol arrangement, no layout/routing.
U1: wrong requested variant, STM32F756VGT6 LQFP-100. All captured supply and ground pins reportedly connected, with VDD/VBAT decoupling, analog decoupling, two 2.2 µF VCAP capacitors, BOOT0 pulldown and NRST capacitor. Package-specific facts still need authoritative checking and remapping to ZGT6.
U2: LMR50410XDBVR created from TI SLUSDW3A; input direct from protected 24 V, EN tied to VIN. 10 µH generic inductor; 2×22 µF output, 2×2.2 µF plus 100 nF input, 100 nF boot capacitor; divider 51 kΩ / 22.1 kΩ. No SPICE run. Select actual inductor and verify saturation/current/footprint and effective capacitance before release.
J1: provisional Molex 43650-0200, reported pin 1 +24 V / pin 2 GND. Its family/polarity/footprint were not verified from Molex drawing; check before physical design.
D1: SS26G reverse-polarity series diode; D2: SMBJ28A input TVS; C1: 47 µF / 50 V bulk. C1 polarity needs checking. The reported TVS full-current clamp is above U2 absolute maximum: do NOT claim surge-safe protection. Input environment must be specified and protection redesigned accordingly.
Each UART uses 100 Ω series resistors and SRV05-4 array. ESD array pinout was not verified against an accessible datasheet. Protection does not cover 24 V miswiring.
J2/J3/J4 are provisional TX/RX/GND headers with no device power.
J6: three MOSFET controls plus ground, each control with 100 kΩ pulldown. No actual power MOSFET stages.
Exact K7805-2000RL not verified; 5 V branch absent. Do not silently substitute another manufacturer's K7805 or guess the suffix.
Intended Signal Mapping to Recheck on ZGT6
Table
Function
Intended MCU signals
I²C1
PB8 SCL, PB9 SDA
Temperature Alert
PB5
Eight LEDs
PE0–PE7
UM982 USART2
PA2 TX, PA3 RX
TF-02 Pro 1 USART3
PD8 TX, PD9 RX
TF-02 Pro 2 USART6
PC6 TX, PC7 RX
MOSFET controls
PD12–PD14
SWD
PA13, PA14, NRST
These are GPIO signal names, NOT package pin numbers. Verify peripheral AFs and remap all supplies/grounds/VCAP/boot/reset for STM32F756ZGT6 using authoritative ST data before reconnecting.
Checks So Far
Builder reported one ERC error for U2 FB not driven, accepted as a passive-divider false positive, plus three missing ESD pin-type warnings. This is not an independent verification result. Additional unresolved factual checks: MCU pin/AF/capacitor requirements, ESD pinout, input connector geometry, polarized capacitor orientation, inductor specification, and input transient protection.
Resume Work
Recover the active independent electrical review, if available. Internal review reference a9; builder reference 2b. The reviewer was started before the user specified ZGT6 and may be checking the old variant, so update its scope.
Replace U1 with exact STM32F756ZGT6 after sourcing package, pinout and electrical requirements. Reconnect by function, not old physical numbers. Preserve and verify the desired peripheral allocation.
Resolve concrete electrical findings with a focused build correction and bounded independent recheck. Check fresh ERC and distinguish physical pre-layout warnings.
Update Specification and capture notes with verified evidence. A capture plan and bring-up plan were requested but not produced; do not claim they exist.
Ask user for missing load and module details before filling blocked power stages or external power interfaces. Pause before schematic drafting/layout expansion.
Questions That Need the User
Hi-Link exact module: provide label photo or datasheet for K7805-2000RL. No substitute by default; this unblocks the 5 V branch and its footprint.
Each of three switched loads: voltage, steady/inrush current, resistive versus inductive, and high-side versus low-side requirement. Default remains three safe-low control signals only; this unblocks MOSFET selection and flyback/protection.
UM982: bare module or carrier, and carrier model. Default is external 3.3 V TX/RX/GND interface without board power; this unblocks supply and connector selection.
Should this board power both TF-02 Pro devices? Default is signal-only/external power until confirmed. This unblocks the 5 V load budget and LiDAR connectors.
24 V source type, voltage range and transient environment; UART cable lengths and baud rates. Default is a regulated bench-prototype supply and short cables only, not a surge-compliance claim.
Final board size/mounting and connector preferences can wait until layout; current headers are provisional.