BQ25185 Charger Topology

flux

El adjunto solicita sólo un documento de cierre de ingeniería. Crearé el plan único con progreso 0–100%, decisiones abiertas, bloqueos y paquete de exportación previsto, sin modificar el diseño ni generar archivos de fabricación.

flux

Estado consolidado: la arquitectura y documentación están avanzadas, pero las decisiones físicas/eléctricas y varios componentes exactos impiden cerrar PCB/fabricación. Crearé el plan de 80% con el backlog ordenado.
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Brand NewDay — Flux 80 Percent Completion Plan

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Mandatory state: BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION Scope: Engineering closure backlog only. No schematic, PCB, nets, B...

flux

Fase 3 completada sin modificar esquema, PCB, nets, BOM, librerías, placement ni routing.
Brand NewDay — Flux 80 Percent Completion Plan
El plan muestra el avance 0–100%, el estado completo en Flux, decisiones que debe definir el usuario, bloqueos de EasyEDA, paquete final previsto y la secuencia de cierre de 80% a 100%. El estado permanece BENCH_ONLY / 0% fabrication release.
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Project Specification — Brand NewDay Flux Shadow PCB
Project Overview
Clean-room shadow reconstruction in Flux for the Brand NewDay system. Status: BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION.
Intended Use
Architecture, schematic, and PCB-placement/routing capability evaluation only. This project must not be treated as a fabrication release, equipment authorization, RF/impedance certification, DFM approval, or permission to overwrite KiCad candidates.
Non-Negotiable Source Constraints
  • Authoritative input: Brand_NewDay_Flux_Shadow_PCB_Brief_v1.txt plus Brand_NewDay_Flux_Shadow_Agent_Instruction_v1.txt.
  • Do not import, modify, overwrite, or claim to reproduce KiCad N039/N040/N041.
  • Use exact MPN/value/reference-designator intent from the brief wherever available.
  • Maximum starting envelope: 170 mm × 140 mm, 4 layers.
  • Smaller board only after placement/clearance/thermal/relay/antenna/connector/service constraints are justified.
Main Features / Functional Blocks
  1. USB-C service input, USB ESD protection, CC resistors, CP2102N USB-UART bridge.
  2. BQ25185DLHR single-cell charger/power-path, BQ29700 protection, TPS63030 buck-boost.
  3. LM5069 + Q1 protected power entry, LM5164 5 V buck, TPS7A2033 3.3 V logic rail.
  4. CC1354P106 radio/controller, UART, SPI, reset, RF interfaces/keepouts.
  5. MCP41HV51 digital potentiometer.
  6. Three 5 V relay channels with MOSFET drivers, flyback diodes, gate resistors, and gate-bias resistors.
  7. Q2/Q3 experimental AirTag MOSFET paths: DNP / BENCH_ONLY only.
Critical BQ25185 Correction
Official BQ25185DLH/WSON-10 mapping required by the brief:

Table

PinFunctionRequired handling
U3.1SYSBelongs to SYS node only.
U3.2BATBattery-positive / cell-positive node per brief.
U3.3STAT2Status output; not SYS.
U3.4CEActive-low charge enable; must connect to GND for this shadow build. Never connect to SYS.
U3.5GNDGround / pack-negative side per brief.
U3.6TS/MRSupport network via R25 per brief.
U3.7ILIM/VSETProgramming network via R6 per brief.
U3.8ISETProgramming network via R7 and C3 per brief.
U3.9STAT1Status output; not SYS.
U3.10INAIRTAG_CHG_5V input.
U3.11Exposed padAIRTAG_PACK_NEG/GND.
C5 / SYS Capacitor Requirement
  • C5 = 10 µF, 25 V, 0805, SYS capacitor.
  • Connect C5 from SYS to GND close to U3.
  • Datasheet requirement recorded from brief: at least 10 µF ceramic nominal and at least 1 µF effective after DC-bias derating, from SYS to GND, close to SYS/GND pins.
  • Do not connect CE to C5/SYS.
Verified Connectivity Ledger From Brief
USB Service
  • USB_VBUS_RAW: J1 A4/A9/B4/B9.
  • USB_CC1: J1 A5 to U1.4; USB_CC2: J1 B5 to U1.5; R1/R2 are 5.1 kΩ Rd resistors.
  • USB_D_P: J1 A6/B6, U1.1, U2.4.
  • USB_D_N: J1 A7/B7, U1.2, U2.5.
  • DGND_SERVICE includes J1 shields/grounds, U1, U2, logic/power grounds, and U9 exposed pad.
  • USB_UART_TXD_MCU_RX: U2.26 to U9.11.
  • USB_UART_RXD_MCU_TX: U2.25 to U9.10.
BQ25185 / Battery / AirTag
  • AIRTAG_CHG_5V: U3.10 (IN).
  • AIRTAG_CELL_POS: U3.2 (BAT), U4.5, U8.5/U8.6/U8.8.
  • AIRTAG_CELL_NEG: U4.4 and battery-side support parts.
  • AIRTAG_PACK_NEG: U3.5, U3.11 exposed pad, U8 ground pins.
  • AIRTAG_3V0: U8.1 output.
  • AIRTAG_BUCK_L1: U8.4 to L2.1.
  • AIRTAG_BUCK_L2: U8.2 to L2.2.
  • AIRTAG_FB: U8.10.
  • BQ25185_ISET_PROG: U3.8.
  • BQ25185_TS_MR: U3.6.
  • BQ25185_VSET_PROG: U3.7.
Power Input / 5 V
  • VIN_RAW: U6.2.
  • VIN_SENSE: U6.1.
  • VIN_PROTECTED: U6.9 to U7.2.
  • MACHINE_POWER_GOOD: U6.8, U7.3, U7.6.
  • LM5069 control: U6.3 UVLO, U6.4 OVLO, U6.6 TIMER, U6.7 PWRSET, U6.10 Q_HS1_GATE.
  • LM5164: U7.4 RON, U7.5 FB, U7.7 BST, U7.8 SW.
  • RX_5V: K1.5, K2.5, K3.5, U5.1/U5.3.
CC1354 / Digital
  • RX_3V3: U2.6/U2.7, U5.5, U9.13/U9.22/U9.34/U9.44, U10.1.
  • MCP_SPI_SCK: U9.12 to U10.2.
  • MCP_SPI_CS_N: U9.14 to U10.3.
  • MCP_SPI_MOSI: U9.15 to U10.4.
  • MCP_SPI_MISO: U9.16 to U10.5.
  • MCP_SHDN_SAFE_N: U10.7.
  • CC1354_RESET_N: U9.35.
  • CC1354_DCOUPL: U9.23.
  • CC1354_VDDR: U9.45/U9.48.
  • RF915_N/P: U9.4/U9.3.
  • RF_PA20_N/P: U9.6/U9.5.
Relay Channels
  • RELAY_K1_DRIVE: U9.26; RELAY_K1_COIL_NEG: K1.4; RX_5V: K1.5.
  • RELAY_K2_DRIVE: U9.27; RELAY_K2_COIL_NEG: K2.4; RX_5V: K2.5.
  • RELAY_K3_DRIVE: U9.28; RELAY_K3_COIL_NEG: K3.4; RX_5V: K3.5.
  • Relay contact pins K1/K2/K3 pads 1/2/3 intentionally unresolved external contacts; do not invent machine/load wiring.
Layout Requirements
  • 4 layers; do not claim controlled impedance without manufacturer stack-up.
  • USB-C, ESD, CC resistors, CP2102N as one service cluster.
  • BQ25185/C4/C5/C6/programming network compact; minimize SYS/GND loop.
  • LM5164/L1/C10/C11/C12 compact and isolated from RF/USB.
  • RF/antenna interfaces and keepout reserved; do not invent antenna geometry.
  • Relays/flyback/MOSFET drivers/high-current paths away from RF/control paths.
  • Ordinary through vias only; no microvias/HDI.
  • Do not relax DRC or rules to hide errors.
Open Decisions / Data Not To Assume
  • Battery chemistry, capacity, protection arrangement, max charge voltage, allowed charge current.
  • USB role/current contract beyond basic USB-C sink Rd intent, connector/ESD requirements.
  • High-voltage input range and load current for LM5069/LM5164 path.
  • Machine/load wiring for relay contacts.
  • RF band, antenna part/geometry, matching network, keepout, compliance target.
  • Final manufacturer stack-up, copper weight, dielectric data, impedance requirements, creepage/clearance, DFM capability.
  • Environmental, thermal, enclosure, mounting, connector access, and test-point requirements.
Acceptance Criteria
  • Distinguish verified facts from assumptions.
  • U3.4/CE separate from SYS and tied to GND for this shadow build.
  • Q2/Q3 preserved as DNP/BENCH_ONLY.
  • Relay contacts pins 1/2/3 not connected to real load/machine nets.
  • Return missing inputs before claiming complete/fabricable design.
  • Final status: BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION.
Change Notes
  • Created from attached v1 brief and agent instruction on 2026-07-27.

  • Project Overview

  • Intended Use

  • Non-Negotiable Source Constraints

  • Main Features / Functional Blocks

  • Critical BQ25185 Correction

  • C5 / SYS Capacitor Requirement

  • Verified Connectivity Ledger From Brief

  • USB Service

  • BQ25185 / Battery / AirTag

  • Power Input / 5 V

  • CC1354 / Digital

  • Relay Channels

  • Layout Requirements

  • Open Decisions / Data Not To Assume

  • Acceptance Criteria

  • Change Notes

Brand NewDay Shadow PCB thumbnail
Clean-room BENCH_ONLY shadow schematic and 4-layer PCB proposal for Brand NewDay; not for fabrication or energization.

Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor

Qty 1

Arrow

$16.13–$22.71

Digi-Key

$1.42

HQonline

$1.99–$2.05

LCSC

$16.36

Mouser

$44.75

TME

$5.37

Verical

$9.04–$14.22

Controls