BQ25185 Charger Topology
Thought for 48 sec
El adjunto solicita sólo un documento de cierre de ingeniería. Crearé el plan único con progreso 0–100%, decisiones abiertas, bloqueos y paquete de exportación previsto, sin modificar el diseño ni generar archivos de fabricación.
Thought for 29 sec
Estado consolidado: la arquitectura y documentación están avanzadas, pero las decisiones físicas/eléctricas y varios componentes exactos impiden cerrar PCB/fabricación. Crearé el plan de 80% con el backlog ordenado.
Worked for 25 sec
Created a project doc
Brand NewDay — Flux 80 Percent Completion Plan
Mandatory state: BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION Scope: Engineering closure backlog only. No schematic, PCB, nets, B...
Fase 3 completada sin modificar esquema, PCB, nets, BOM, librerías, placement ni routing.
El plan muestra el avance 0–100%, el estado completo en Flux, decisiones que debe definir el usuario, bloqueos de EasyEDA, paquete final previsto y la secuencia de cierre de 80% a 100%. El estado permanece BENCH_ONLY / 0% fabrication release.
Prepare export package
Fix library gaps
Select passive MPNs
Review closure risks
Plan next schematic fixes
Refine this doc
Ask about this doc
Phase 2.2 — Proxy Pin Qualification Report
Status: BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION
Method: Read-only comparison of the current Flux symbol pin numbers/names and package properties against official manufacturer datasheets for the exact target MPNs. No schematic, PCB, nets, BOM, components, placement, or routing were modified.
Method: Read-only comparison of the current Flux symbol pin numbers/names and package properties against official manufacturer datasheets for the exact target MPNs. No schematic, PCB, nets, BOM, components, placement, or routing were modified.
Result Summary
Table
| Reference | Target MPN | Current proxy | Symbol/pin comparison | Package comparison | Result |
|---|---|---|---|---|---|
| J1 | DX07S016JA3R1500 | DX07S016JA1R1500 | Both are JAE DX07S016 16-position USB Type-C variants; official JAE material indicates common connector family/specification and the same logical USB 2.0 contact set. Exact pin drawing was not exposed for direct terminal-by-terminal verification. | Mismatch: JA1 shell-DIP length is 0.9 mm; JA3 shell-DIP length is 1.2 mm. Different official drawings: JA1 SJ121837, JA3 SJ122206. | MISMATCH |
| U9 | CC1354P106T0RGZR | CC1352P1F3RGZR | Current proxy pins 1–48 exactly match the official CC1354P10 RGZ table: RF_P/N_2.4, RF_P/N_Sub-1G, TX20 P/N, RX_TX, crystals, DIO5–DIO30, supplies, DCOUPL, JTAG, RESET, DCDC_SW, VDDR and VDDR_RF. EP is ground. | Current proxy property is QFN-48, 7×7 mm, 0.5 mm pitch with exposed pad; target is TI RGZ VQFN-48, 7×7 mm, 0.5 mm pitch. | VERIFIED — symbol/footprint proxy only; silicon/MPN is not a functional substitute |
| U10 | MCP41HV51-503E/ST | MCP45HV51-ST | Mismatch. Target pins: 1 VL, 2 CS, 3 SCK, 4 SDI, 5 SDO, 6 WLAT, 7 SHDN, 8 DGND, 9 V−, 10 P0B, 11 P0W, 12 P0A, 13 V+, 14 NC. Proxy pins: 1 VL, 2 SCL, 3 A1, 4 SDA, 5 A0, 6 WLAT, 7 NC, 8 SHDN, 9 DGND, 10 V−, 11 P0B, 12 P0W, 13 P0A, 14 V+. Pins 2–14 are functionally shifted/different. | Both are TSSOP-14, but same package count does not make the pinout compatible. | NO PROXY SAFE |
| U8 | TPS63030DSKR | TPS63030DSK | Exact match to TI table: 1 VOUT, 2 L2, 3 PGND, 4 L1, 5 VIN, 6 EN, 7 PS/SYNC, 8 VINA, 9 GND, 10 FB, exposed pad PGND. | Proxy WSON/VSON-10 2.5×2.5 mm, 0.5 mm pitch, EP 1.2×2.0 mm matches TI DSK0010A. DSKR differs only by large T&R orderable suffix. | VERIFIED |
| U6 | LM5069MM-1/NOPB | LM5069MMX-1/NOPB | Exact match to TI DGS table: 1 SENSE, 2 VIN, 3 UVLO, 4 OVLO, 5 GND, 6 TIMER, 7 PWR, 8 PGD, 9 OUT, 10 GATE. Both are LM5069-1 latch-off devices. | Both are DGS VSSOP-10. MM vs MMX changes reel quantity only. | VERIFIED |
| K1-K3 | G5LE-14-DC5 | G5LE-1-DC5 | Target official pin functions: pin 2 coil, pin 5 coil, pin 1 COM, pin 3 NO, pin 4 NC. Current proxy symbol exposes only numeric pins and the existing schematic treats pins 4/5 as the coil and 1/2/3 as contacts. This conflicts with the official target terminal arrangement. | G5LE-1 and G5LE-14 share the 5-pin SPDT family arrangement; -14 is fully sealed while -1 is flux-protected. Mechanical family is similar, but the current symbol/net interpretation is unsafe. | MISMATCH |
| Q4-Q6 | CSD13380F3 | CSD13380F3T | Exact TI assignment: 1 Gate, 2 Source, 3 Drain. Current proxy: 1 G, 2 S, 3 D. | Same TI PICOSTAR/YJM 3-pin package, approximately 0.73×0.64 mm; T suffix changes reel quantity only. | VERIFIED |
| L1 | MSS1246T-683MLB | Generic Inductor | Target is a non-polarized two-terminal inductor; generic symbol P1/P2 is electrically neutral and usable only as a logical placeholder. | Mismatch: target is 12.0×12.0×4.6 mm with Coilcraft land pattern approximately 5.5×5.0 mm pads and 4.0 mm inner gap. Current generic footprint/layout representation is much smaller and is not the qualified MSS1246T footprint. | MISMATCH |
Required Actions
Table
| Reference | Required action before any later design phase |
|---|---|
| J1 | Replace with exact DX07S016JA3R1500 footprint from JAE drawing SJ122206; retain symbol only after exact contact table is confirmed. |
| U9 | Symbol/footprint pin mapping may remain as a temporary proxy, but exact CC1354P106T0RGZR library identity is still required before BOM/firmware/layout sign-off. |
| U10 | Replace with exact MCP41HV51-503E/ST and rewire every interface/power/analog pin; current proxy is unsafe. |
| U8 | Proxy is pin/package verified; change only library/orderable identity to exact TPS63030DSKR when available. |
| U6 | Proxy is pin/package verified; MM/MMX selection is a procurement quantity decision. |
| K1-K3 | Replace exact relay symbol/footprint and correct coil/contact pin interpretation before any energization; continue keeping external contacts unconnected. |
| Q4-Q6 | Proxy is verified; choose desired reel suffix for procurement. |
| L1 | Assign exact MSS1246T-683MLB footprint and verify current/thermal ratings before layout. |
Preserved Constraints
- AIRTAG_CHG_SYS remains U3.SYS + C5.1.
- U3.CE remains on AIRTAG_PACK_NEG/GND, never SYS.
- Q2/Q3 remain DNP / BENCH_ONLY.
- K1/K2/K3 external contacts remain unconnected.
Result Summary
Required Actions
Preserved Constraints
