BQ25185 Charger Topology

La auditoría confirma que U1 tiene el mismo pinout y paquete DQA-10 que el nuevo objetivo, pero es un dispositivo ESD diferente y no puede calificarse como sustituto funcional. Crearé ahora la matriz completa, manteniendo criterios conservadores para todos los pasivos genéricos.
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Component and Footprint Qualification Matrix

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Mandatory status: BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION Scope: Read-only audit of the current 69-designator project. No sc...
La matriz completa quedó creada con los 69 designadores y criterios conservadores de fabricación; cierro la auditoría sin cambios de diseño.
Auditoría completada para los 69 designadores, sin modificar esquema, PCB, nets, BOM, librerías, placement ni routing.
La matriz destaca como bloqueos principales: J1, cambio requerido de U1 a TPD4E05U06DQAR, U10, K1–K3, L1 y todos los pasivos genéricos sin MPN exacto. El proyecto permanece BENCH_ONLY.
Fix blockers and recheck
Create exact parts
Plan replacement phase
Export documentation package
Audit passive MPNs

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Phase 2.3 — Exact Library Entry Creation Report
Status: BLOCKED / BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION
Design mutations: None. No schematic, PCB, nets, BOM, placement, routing, or existing components were modified or replaced.
Platform Blocker
The component-library creation capability is not available in the current tool session. Therefore, no new publishable Flux library entries could be created or verified in their own part projects. The exact official-datasheet specifications below are complete enough to execute creation when that capability is available.
Requested Entries

Table


ReferenceExact entryOfficial symbol/pinout specificationOfficial footprint/package specificationCreation statusRequired follow-up
U10MCP41HV51-503E/ST — MicrochipTSSOP-14 pins: 1 VL (Power In), 2 CS (Input), 3 SCK (Input), 4 SDI (Input), 5 SDO (Output/Tri-State), 6 WLAT (Input), 7 SHDN (Input), 8 DGND (Ground), 9 V− (Power In), 10 P0B (Passive/Analog), 11 P0W (Passive/Analog), 12 P0A (Passive/Analog), 13 V+ (Power In), 14 NC. SPI, 50 kΩ (-503), E temperature grade.Microchip /ST TSSOP-14, 4.4 mm body width class, 0.65 mm pitch; footprint must be generated from official Microchip package drawing in DS20005304.NOT CREATED — PLATFORM BLOCKERCreate exact part project; verify 14 symbol terminals, pad numbering 1–14, pin-1 orientation, 0.65 mm pitch, distinct pads and TSSOP courtyard. Do not use MCP45HV proxy.
K1-K3G5LE-14-DC5 — OmronSPDT/1c relay, five terminals. Official bottom-view mapping: pin 2 coil, pin 5 coil, pin 1 COM, pin 3 NO, pin 4 NC. 5 VDC coil approximately 79.4 mA, 63 Ω, 400 mW. Fully sealed variant (-14).Through-hole Omron G5LE five-hole pattern from official G5LE drawing; body max approximately 22.5 × 16.5 × 19.0 mm. Hole diameter and spacing must follow official bottom-view mounting-hole drawing.NOT CREATED — PLATFORM BLOCKERCreate exact relay symbol with named Coil/COM/NO/NC terminals; verify bottom-view pad numbering and mechanical outline. Existing proxy interpretation must not be reused without replacement.
L1MSS1246T-683MLB — CoilcraftNon-polarized 2-terminal shielded power inductor; pins 1 and 2 passive. 68 µH ±20%; DCR 167 mΩ typ / 186 mΩ max; Isat up to 2.3/2.5/2.7 A; Irms 1.3/1.8 A. Ordering: MSS1246T series, 683=68 µH, M=±20%, L=matte-tin termination, B=less-than-full-reel packaging.Body 12.0 × 12.0 × 4.6 mm. Official recommended land pattern: pads about 5.5 × 5.0 mm, 4.0 mm inner gap, 8.5 mm overall reference span.NOT CREATED — PLATFORM BLOCKERCreate exact two-pin part with Coilcraft land pattern; verify body/courtyard/terminal geometry and no polarity. Current generic footprint is not acceptable.
J1 Decision
No entry was created for DX07S016JA3R1500. It remains an open decision as requested. The exact JAE MPN is known, but exact contact/footprint qualification requires the official JAE drawing SJ122206; it was not included in this creation scope.
Verification Required After Creation
  1. Open each new part project and confirm terminal count, pin names, pin types, numbering, package identity, and pin-1 orientation.
  2. Inspect footprint pads for distinct/non-overlapping geometry and official pitch/spacing.
  3. Confirm footprint body/courtyard dimensions against the manufacturer drawing.
  4. Do not replace U10, K1-K3, or L1 in the Brand NewDay project until a separately approved replacement phase.
Preserved Constraints
  • AIRTAG_CHG_SYS remains U3.SYS + C5.1.
  • U3.CE remains connected to AIRTAG_PACK_NEG/GND, never SYS.
  • Q2/Q3 remain DNP / BENCH_ONLY.
  • K1/K2/K3 external contacts remain unconnected.
  • Platform Blocker

  • Requested Entries

  • J1 Decision

  • Verification Required After Creation

  • Preserved Constraints

Brand NewDay Shadow PCB thumbnail
Clean-room BENCH_ONLY shadow schematic and 4-layer PCB proposal for Brand NewDay; not for fabrication or energization.

Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor

Qty 1

Arrow

$16.13–$22.71

Digi-Key

$1.42

HQonline

$1.99–$2.05

LCSC

$16.36

Mouser

$44.75

TME

$5.37

Verical

$9.04–$14.22

Controls