BQ25185 Charger Topology

Aplicaré únicamente la corrección autorizada de U9: crearé C20 dedicado en VDDR, conservaré C15 y el modo LDO interno, colocaré sólo C20 junto a U9 y verificaré conectividad/ERC con capturas enfocadas.
C20 quedó añadido y colocado junto a U9 sin tocar otros bloques. Estoy cerrando la verificación independiente de nets, footprint y ERC.
Corrección U9 aplicada y guardada:
  • C20: Murata GRM21BZ71A226ME15L, LCSC C907991, 22 µF, 10 V, X7R, 0805
  • C20.1 → CC1354_VDDR
  • C20.2 → DGND_SERVICE
  • C15 permanece entre RX_3V3 y DGND_SERVICE
  • U9 permanece en modo LDO interno, con DCDC_SW NC
  • C20 fue colocado junto a U9; no se movieron otros componentes
ERC: 9 hallazgos preexistentes e intencionales — U10 NC, cuatro nets RF abiertas y cuatro nets LM5069 abiertas. C20 no introdujo errores nuevos. Las capturas enfocadas de esquema y PCB se muestran arriba.
BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION.
Fix ERC blockers
Update sourcing notes
Review C20 placement
Arrange U9 block

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Phase 8 — Power Passives Qualification for JLCPCB
State: BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION
Scope: Sourcing and qualification only. No schematic, PCB, BOM, placement, routing, J1, L2, U10, battery, LM5069 or RF mutation was performed.
Stock warning: Availability below reflects indexed LCSC/JLCPCB pages observed during this review and must be rechecked at order time.
Qualification matrix

Table


RefProposed exact MPNManufacturerLCSC/JLCPCBAvailabilityPackage / dimensionsElectrical dataTechnical dispositionRisk
R9PCSR2512BR100M6RESIC23067426VERIFIED_AVAILABLE2512 / 6.35 × 3.2 mm class0.100 Ω, ±0.1%, 1 W, TCR ±15 ppm/°CPurpose-built current-sense/shunt part and continuous rating matches the present requirement. The accessible official/product data did not establish a guaranteed pulse-energy or short-time-overload curve for the project fault profile. LM5069 VIN, inrush and TIMER remain undefined, so pulse suitability cannot be closed.PENDING_APPROVAL / BLOCKS_PCBA
C5GRM21BR61E106KA73LMurataC84416VERIFIED_AVAILABLE0805; 2.0 ±0.15 × 1.25 ±0.15 × 1.25 ±0.15 mm10 µF ±10%, 25 V, X5ROfficial Murata characteristic data indicates approximately 5.0–5.5 µF effective at 4.2 V and 4.3–4.8 µF at 5 V; comfortably above the project requirement of ≥1 µF effective on SYS. ESR is in the milliohm range around converter frequencies and ripple self-heating data is provided.APPROVED_FOR_SCHEMATIC
C10GRM32ER72A225KA35LMurataC86054VERIFIED_AVAILABLE1210 / 3.2 × 2.5 mm class2.2 µF ±10%, 100 V, X7RCorrect nominal rating and package. The exact effective-capacitance curve at the actual VIN was not verified, and project VIN/transient limits remain open. No invented DC-bias value is used.PENDING_APPROVAL / BLOCKS_PCBA
C12GRM32ER71E226KE15LMurataC21397EXTENDED / available in indexed listing1210; 3.2 ±0.3 × 2.5 ±0.2 × 2.5 ±0.2 mm22 µF ±10%, 25 V, X7RCorrect value/rating and low-ESR MLCC construction. Manufacturer documentation warns of DC-bias loss and self-heating but the exact 5 V effective capacitance and required LM5164 output minimum were not closed in this phase.PENDING_APPROVAL
C13GCM21BR70J106KE22LMurataC126230EXTENDED / VERIFIED_AVAILABLE0805; 2.0 ±0.15 × 1.25 ±0.15 × 1.25 ±0.15 mm10 µF ±10%, 6.3 V, X7R, −55…125°CCorrect nominal rating and automotive-grade family. The official sheet confirms strong DC-bias dependence but the exact effective capacitance at 4.2 V was not reliably extractable. Must be checked against the TPS63030 minimum input-capacitance requirement.PENDING_APPROVAL
C14, C15 — exact-rating optionGRM21BZ70J226ME44KMurataC20879542OUT_OF_STOCK0805 / 2.0 × 1.25 mm class22 µF ±20%, 6.3 V, X7RExact requested nominal specification but unavailable in the indexed listing; cannot be assembly-approved.BLOCKS_PCBA
C14, C15 — preferred available candidateGRM21BZ71A226ME15LMurataC907991VERIFIED_AVAILABLE0805 / 2.0 × 1.25 mm class22 µF ±20%, 10 V, X7RHigher voltage rating and same value/package/dielectric. Remains pending because the exact DC-bias curve at 3.0–3.3 V and TPS63030 output effective-capacitance requirement were not verified in this phase.PENDING_APPROVAL
C20603B475K100NTFenghua AdvancedC108342EXTENDED / VERIFIED_AVAILABLE0603; 1.6 × 0.8 mm class4.7 µF ±10%, 10 V, X7RCorrect value/package and sufficient voltage for RX_3V3. Manufacturer series data does not provide a part-specific 3.3 V DC-bias curve, so effective capacitance is unverified.PENDING_APPROVAL
C4CC0603KRX7R8BB105YageoC106858VERIFIED_AVAILABLE0603; 1.6 ±0.1 × 0.8 ±0.1 × 0.8 ±0.1 mm1 µF ±10%, 25 V, X7ROfficial Yageo bias data gives about 0.85–0.88 µF effective at 5 V before temperature/aging tolerance. This is below 1 µF nominal; approval depends on whether the BQ25185 requirement is nominal or effective minimum.PENDING_APPROVAL
C6CC0603KRX7R8BB105YageoC106858VERIFIED_AVAILABLE0603; same dimensions1 µF ±10%, 25 V, X7RHigher voltage rating than the current 10 V requirement. Approx. 0.88–0.9 µF effective around the 4.2 V cell region, before temperature/aging. Verify BQ25185 BAT-cap effective-minimum requirement.PENDING_APPROVAL
C8, C9CL10B105KP8NNNCSamsung Electro-MechanicsC95843VERIFIED_AVAILABLE0603 / 1.6 × 0.8 mm class1 µF ±10%, 10 V, X7RCorrect nominal value/rating/package and widely stocked. A part-specific DC-bias curve at RX_5V/RX_3V3 was not verified from the official sheet, so TPS7A20 effective input/output capacitance cannot yet be guaranteed.PENDING_APPROVAL
Sources
Official manufacturer data
  • Murata product specification and characteristic data: GRM21BR61E106KA73L, GRM32ER72A225KA35L, GRM32ER71E226KE15L, GCM21BR70J106KE22L, GRM21BZ70J226ME44K, GRM21BZ71A226ME15L.
  • Yageo official/simulation sheet: CC0603KRX7R8BB105.
  • Samsung Electro-Mechanics official datasheet: CL10B105KP8NNNC.
  • Fenghua Advanced official MLCC series datasheet: 0603B475K100NT.
  • RESI product data for PCSR2512BR100M6.
LCSC/JLCPCB pages
Phase 8 conclusion
  • Approved for schematic annotation: C5 only.
  • Technically suitable candidates pending exact operating-data closure: R9, C10, C12, C13, C14/C15 available candidate, C2, C4, C6, C8 and C9.
  • Blocks PCBA: R9 until fault-pulse analysis; C10 until VIN/DC-bias closure; exact C14/C15 option because it is out of stock; all remaining candidates until effective-capacitance requirements are explicitly demonstrated.
  • No candidate was applied to the project design or BOM.
  • Qualification matrix

  • Sources

  • Official manufacturer data

  • LCSC/JLCPCB pages

  • Phase 8 conclusion