BQ25185 Charger Topology

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Phase 8 — Power Passives Qualification for JLCPCB

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State: BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION Scope: Sourcing and qualification only. No schematic, PCB, BOM, placement, ro...

flux

Phase 8 completed without schematic, PCB, BOM, placement, or routing changes.
  • C5 approved for schematic: Murata GRM21BR61E106KA73L, LCSC C84416.
  • R9 and remaining capacitors have exact candidates but remain pending pulse-energy or DC-bias validation.
  • The exact C14/C15 option is out of stock; an available 10 V X7R candidate is documented.
Phase 8 — Power Passives Qualification for JLCPCB
BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION.

flux

I’ll read the attachment and follow only its authorized scope for the current BENCH_ONLY project.

flux

Fase 9 quedó parcialmente investigada antes de agotarse los ACUs.
Completado:
  • Extraje requisitos oficiales para C2, C4/C6, C8/C9, C12 y C13/C14.
  • Confirmé que C12 ofrece aproximadamente 15.54 µF efectivos a 5 V, suficiente frente al mínimo calculado LM5164 de 3.1 µF.
  • Identifiqué que C15 está conectado a RX_3V3, pero el requisito TI de 22 µF corresponde a VDDR, por lo que su función debe revisarse.
Pendiente:
  • Obtener curvas oficiales numéricas de DC-bias para C2, C13 y C14/C15.
  • Emitir los veredictos finales por designador.
  • Crear el reporte Fase 9 y actualizar las notas de sourcing.
No se modificaron esquema, PCB, BOM, placement ni routing. BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION.
Resume Fase 9
Create report
Review C15 connection
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U10 Pin 8–9 Library Defect and ERC Disposition
Status: BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION
Updated: 2026-07-28
The exact Flux entry used for U10 (MCP41HV51-503E/ST) labels TSSOP-14 pin 8 as NC and pin 9 as DGND. Microchip datasheet DS20005207B, Table 3-1, specifies pin 8 = DGND and pin 9 = NC.
Both current U10 terminals are connected to DGND_SERVICE. This is electrically acceptable because Microchip requires DGND at ground and recommends connecting NC to either DGND or VL to reduce noise coupling. Flux reports No-connect pin connected: U10:NC; this is a justified library-metadata ERC finding, not an unintended electrical connection.
The library entry still requires correction before fabrication release. The warning must not be globally suppressed.
Current full ERC disposition
9 findings total:
  • Justified library finding (1): U10:NC connected because of the pin 8/9 metadata defect.
  • Intentional LM5069 opens (4): UVLO, OVLO, TIMER and PWR.
  • Intentional RF opens (4): RF915 P/N and PA20 P/N.
  • New real ERC errors: none.
The previous U8 findings are resolved:
  • PS/SYNC is tied to DGND_SERVICE for power-save mode.
  • AIRTAG_CELL_POS is driven by V_CELL_PLACEHOLDER, an explicit schematic-only 1S source marker excluded from PCB, BOM and pick-and-place. It is not a real battery selection.

  • Current full ERC disposition