BQ25185 Charger Topology
Thought for 6 sec
I’ll read the attachment and follow only its authorized scope for the current BENCH_ONLY project.
Worked for 2 mins 22 sec
Fase 9 quedó parcialmente investigada antes de agotarse los ACUs.
Completado:
- Extraje requisitos oficiales para C2, C4/C6, C8/C9, C12 y C13/C14.
- Confirmé que C12 ofrece aproximadamente 15.54 µF efectivos a 5 V, suficiente frente al mínimo calculado LM5164 de 3.1 µF.
- Identifiqué que C15 está conectado a
RX_3V3, pero el requisito TI de 22 µF corresponde a VDDR, por lo que su función debe revisarse.
Pendiente:
- Obtener curvas oficiales numéricas de DC-bias para C2, C13 y C14/C15.
- Emitir los veredictos finales por designador.
- Crear el reporte Fase 9 y actualizar las notas de sourcing.
No se modificaron esquema, PCB, BOM, placement ni routing. BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION.
Resume Fase 9
Create report
Review C15 connection
Refine this doc
Ask about this doc
Final Schematic Correctness Review
Status: BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION
Visible progress: 75% logical shadow definition / 0% fabrication release
Review date: 2026-07-28
Visible progress: 75% logical shadow definition / 0% fabrication release
Review date: 2026-07-28
This review reflects the current schematic after the exact K1–K3 and U10 replacements and the U8 power-save/source-placeholder correction.
Confirmed current corrections
Table
| Block | Confirmed state | Result |
|---|---|---|
| BQ25185 | AIRTAG_CHG_SYS contains U3.SYS and C5.1 only; U3.CE remains on AIRTAG_PACK_NEG | Correct |
| K1–K3 | Exact G5LE-14 5VDC entries; pin 1 on RX_5V, pin 2 on channel coil-negative net, pins 3–5 external/no-connect | Correct for official Omron pinout |
| U10 | Exact MCP41HV51-503E/ST; SPI nets mapped to SCK/CS/SDI/SDO, WLAT low, SHDN controlled, analog terminals open | Logically correct BENCH_ONLY |
| U10 pins 8/9 | Flux library labels are swapped relative to Microchip. Both physical pads are grounded, satisfying DGND and the recommendation for NC | Electrically acceptable; justified library ERC finding |
| U8 PS/SYNC | Connected to DGND_SERVICE | Power-save mode selected |
| U8 input source | V_CELL_PLACEHOLDER drives AIRTAG_CELL_POS from a schematic-only 1S placeholder connected between CELL_POS and CELL_NEG | Clears ERC without selecting a real battery; excluded from PCB/BOM/PnP |
| TPS63030 | VIN/VINA/EN on AIRTAG_CELL_POS; PS/SYNC low; L1/L2, VOUT and FB memberships preserved | Focused block check clean |
Correct only as a BENCH_ONLY shadow schematic
V_CELL_PLACEHOLDERis not a purchasable battery and does not define chemistry, capacity, protection or permitted charge current.- LM5069 UVLO, OVLO, TIMER and PWR remain intentionally open pending real input/load/SOA requirements.
- Four U9 RF ports remain intentionally open pending antenna, matching, stackup and compliance decisions.
- U10 V+, V− and potentiometer terminals remain on the explicit analog-open net.
- BQ29700 COUT/DOUT and the final protection-FET implementation remain unresolved.
- J1, U1, L1, L2 and generic-passive manufacturing qualification remain open.
- Q2/Q3 remain DNP/BENCH_ONLY; relay contacts remain external and unconnected.
Full ERC disposition
Total findings: 9
Justified library finding — 1
U10:NCconnected: caused by swapped pin 8/9 metadata in the exact Flux entry. Both physical pads are intentionally grounded and the disposition is recorded separately.
Intentional BENCH_ONLY open nets — 8
- LM5069:
LM5069_UVLO_OPEN,LM5069_OVLO_OPEN,LM5069_TIMER_OPEN,LM5069_PWRSET_OPEN. - RF:
RF915_P_OPEN,RF915_N_OPEN,RF_PA20_P_OPEN,RF_PA20_N_OPEN.
New real ERC errors
- None. U8 PS/SYNC and the undriven AIRTAG_CELL_POS error are resolved.
Final verdict
LOGICALLY_CONSISTENT_BENCH_ONLY
- The previously identified U10, relay and U8 electrical errors have been corrected.
- The TPS63030 block now has a defined power-save state and an explicit non-manufacturing source placeholder.
- Current ERC contains no new unintended connectivity error.
- The U10 NC finding is a documented library-metadata defect with an electrically acceptable grounding disposition.
- Eight remaining single-pin nets are deliberate BENCH_ONLY markers for unresolved LM5069 and RF design work.
- Battery selection, protection completion, RF, LM5069 settings and manufacturing qualification remain incomplete.
- The schematic is logically consistent only as a shadow design and must not be energized or released to PCB/fabrication.
- BENCH_ONLY / NOT FOR FABRICATION / NOT FOR ENERGIZATION.
Confirmed current corrections
Correct only as a BENCH_ONLY shadow schematic
Full ERC disposition
Justified library finding — 1
Intentional BENCH_ONLY open nets — 8
New real ERC errors
Final verdict
