Phase‑1 HIL-Rig PCB-Set für Toob-Boot: SCC Site-Carrier-Card, BKP Backplane und eingefrorene J-DUT/J-BP-Schnittstellen; Phase‑2-Boards nur als Reservierungen/Interfaces dokumentiert.

ESP-farm: 12‑Slot ESP32 Duino-Coin Mining Backplane with Ethernet and Protected Power Distribution — Power net fixes (12V_IN, STAR_5V, TVS topology) and passive MPN assignments (R38–R41, C1–C8) are complete, ERC is clean, and the design is ready for PCB layout