# [4-layer] OSHPARK Constraints ## Description Use this template if you're planning to get your board manufactured in OSHPARK. It has the via min/max and trace width constraints already baked as global rules. #project-template #template #manufacturer-design-rules OSHpark 4-layer stackup specs: Top overlay or silkscreen: 1 mil thick Top solder mask or solder resist: 1 mil thick Top copper: 1.7 mil thick on 1 oz copper Dielectric: 7.96 mil thick FR408HG 2113 Mid layer 1: 0.68 mil thick on 0.5 oz copper Dielectric core: 39 mil thick FR408HR Mid layer 2: 0.68 mil thick on 0.5 oz copper Dielectric: 7.96 mil thick FR408HG 2113 Bottom copper: 1.7 mil thick on 1 oz copper Bottom solder mask or solder resist: 1 mil thick
Bottom overlay or silkscreen: 1 mil thick ## Project Details - **Owner:** sauerc - **Created:** 1/5/2025 - **Last Updated:** 1/5/2025 - **Visibility:** Public *The full schematic, PCB layout, bill of materials, and interactive design are available at [https://www.flux.ai/sauerc/4-layer-oshpark-constraints~39](https://www.flux.ai/sauerc/4-layer-oshpark-constraints~39).* --- *Generated from [https://www.flux.ai/sauerc/4-layer-oshpark-constraints~39](https://www.flux.ai/sauerc/4-layer-oshpark-constraints~39)*