Bill of Materials Overview


Let’s move on to the required decoupling and bulk caps for each regulator output and the SoC power rails. Once these are placed, we’ll connect them.

Table


DesignatorValueFootprintLink
C10.1 µF 16 V0603Capacitor 0.1uF 16V 0603
C20.1 µF 16 V0603Capacitor 0.1uF 16V 0603
C30.1 µF 16 V0603Capacitor 0.1uF 16V 0603
C40.1 µF 16 V0603Capacitor 0.1uF 16V 0603
C54.7 µF 10 V0603Capacitor 4.7uF 10V 0603
C64.7 µF 10 V0603Capacitor 4.7uF 10V 0603
C74.7 µF 10 V0603Capacitor 4.7uF 10V 0603
C84.7 µF 10 V0603Capacitor 4.7uF 10V 0603
– C1–C4: 0.1 µF decoupling on 3.3 V, 1.8 V, 2.8 V, 1.2 V outputs
– C5–C8: 4.7 µF bulk caps on the same rails
Please add these eight capacitors to your schematic. Once done, I’ll guide you through the net connections.
I’ve added all eight capacitors to the schematic. What should I do with the net connections next?
Here’s the net-wiring plan for your decoupling/bulk caps and regulators. You can create named nets (e.g. “3V3”, “1P8”, “2P8”, “1P2”, “GND”) and then wire as follows:

Table


NetPins to Connect
3V3U3.VOUT, C1.P1, C5.P1
1P8U4.VOUT, C2.P1, C6.P1
2P8U5.VOUT, C3.P1, C7.P1
1P2U6.OUT, C4.P1, C8.P1
GNDAll regulator GND pins (U3–U6), and all capacitor P2 pins (C1–C8) wired to the GND symbol from the library (“Ground” power port).
Next steps:
  1. Create nets named 3V3, 1P8, 2P8, 1P2, and GND.
  2. Wire each pin listed above into its net.
  3. Ensure you place the Ground power port symbol and tie all GND wires to it.
Once these are connected, your power rails will be fully defined and decoupled.
Net labeling complete
Verify connectivity
GND wiring check

Schematic of Dominant Apricot Universal Remote

Dominant Apricot Universal Remote

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