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Part Selection Notes
Locked Architecture
The control board is now a 48 V tether-powered electronics controller. There is no internal 4S LiPo battery, no XT60 input, and no ESC high-current path through this PCB.
Confirmed inputs:
- Surface supply: 48 V / 20 A.
- Tether: 20 m, 2 x 1.5 mm² copper conductors.
- Round-trip resistance: approximately 0.5 Ω.
- Worst-case vehicle-side voltage: 43 V.
- PDB ESC rail target: 14.8 V, implemented on the PDB, not on this PCB.
- Preferred 48 V buck family: Texas Instruments LM5116.
- Electronics current sensing: high-side shunt + INA228/INA260-class monitor; Hall sensor ACS758 is removed from the control PCB design direction.
Preferred / Candidate Parts
Table
| Block | Preferred candidate | Notes |
|---|---|---|
| 48 V buck controller | LM5116MH/NOPB | 6-75 V synchronous buck controller, use separate stages for 12 V, 5 V, and 3.3 V unless later optimized. |
| Current/power monitor | INA228AIDGSR | High-side shunt monitor with I2C, preferred over INA260 for 48 V systems because external shunt and voltage limits can be selected deliberately. |
| Input eFuse / hot-swap | TPS26630/TPS26637-class | 60 V-class protection candidate; datasheet must confirm operating margin and current limit behavior for the final inrush profile. |
| MCU | STM32F407VGT6 | LQFP-100, 3.3 V, SWD/JTAG, HSE crystal, UART/I2C/ADC/PWM. |
| IMU | BNO055 | I2C mode, 3.3 V VDD/VDDIO, local 100 nF + 10 uF decoupling. |
| RS485 | SP3485EEN / MAX3485-class | 3.3 V half-duplex RS485, DE/RE control, 120 Ω selectable termination. |
| Emergency stop isolation | PC817 or faster industrial optocoupler | Input from tether, output to STM32 EXTI with pull-up and filtering. |
| Debug | 10-pin Cortex SWD/JTAG | VTREF, SWDIO, SWCLK, NRST, GND, optional SWO/JTAG. |
| ESC headers | 3-pin 2.54 mm headers | GND / PWM / NC, six outputs, 33 Ω series resistor per PWM line. |
| Pressure sensor connector | JST-SH 4-pin | External MS5837-30BA: VCC/GND/SDA/SCL. |
| Temperature sensor connector | JST 3-pin | External DS18B20: VCC/GND/DQ with 4.7 kΩ pull-up. |
| Camera connector | 15-pin FFC/FPC | IMX219-compatible CSI routing requires controlled impedance review. |
| Ethernet | Magnetics-integrated RJ45 or tether pads | Ethernet is managed by Jetson; board only routes connector/tether interface if used. |
Power-Path Design Rules
- All buck circuits must be wired from the LM5116 datasheet/reference design, including VIN, VCC, UVLO, RT/SYNC, CS/CSG, HO/LO, HB/HS, COMP/FB, SS, and gate-drive loop passives.
- Input TVS must be selected for 48 V DC working voltage with cable transient margin; final part must be checked against the surface supply tolerance and eFuse clamp behavior.
- Current shunt value must balance dissipation and ADC/monitor resolution. Target full-scale below 5 A electronics input unless inrush/protection requirements dictate higher.
- Buck inductors must have saturation current above peak inductor current, not merely output current.
- Output capacitor voltage ratings must include derating; ceramic capacitance should be doubled when sizing due to DC-bias derating.
Obsolete Parts / Assumptions
- XT60 battery connector.
- 4S LiPo reverse-polarity P-MOSFET stage.
- TPS5430 for 4S-input rails.
- LM3488 SEPIC/buck-boost discussion for low LiPo voltage.
- ACS758 as the primary electronics current sensor.
Locked Architecture
Preferred / Candidate Parts
Power-Path Design Rules
Obsolete Parts / Assumptions
