Saya lanjutkan dari hasil placement yang sudah ada: saya cek ukuran/stackup, overlap dan keepout antena terlebih dahulu, lalu memperbaiki placement, routing 2-layer, dan DRC akhir.
Saya melanjutkan pemeriksaan dan memastikan board sudah 90 × 90 mm, 2 layer, dengan kepadatan komponen 37,6% sehingga seluruh komponen seharusnya muat di sisi atas.
Hasil pemeriksaan awal menunjukkan placement lama belum valid: seluruh 22 komponen berada di luar outline, terdapat 2 error edge-placement pada J2 dan SW1, serta 43 airwire karena routing belum dilakukan. Proses koreksi placement sudah dijalankan dan selesai, tetapi hasil akhirnya belum sempat saya baca dan verifikasi.
Yang masih perlu dilakukan:
Verifikasi placement baru: overlap, batas board, arah J2/SW1, dan area antena ESP32.
Menetapkan lebar jalur daya 4S/servo hingga sekitar 8 A.
Route seluruh PCB 2-layer.
Menjalankan dan memperbaiki DRC hingga tidak ada airwire atau error manufaktur.
Saya belum dapat mengakses laporan terbaru executor “PCB Placement Setup” atau melakukan inspeksi board, jadi saya tidak bisa memastikan apakah placement 90 × 90 mm sudah bebas overlap, keepout antena ESP32 benar, maupun apakah DRC sudah bersih. Tidak ada perubahan baru yang dapat saya verifikasi pada sesi ini.
Pekerjaan berikutnya tetap:
Rekonsiliasi hasil placement executor.
Perbaiki overlap, clearance tepi, dan keepout antena.
Route jalur daya servo 8 A dengan copper pour/jalur lebar.
Transistor-driven active 5 V buzzer with flyback diode.
System Architecture
Diagram
Hardware Subsystems
Battery Input and Distribution
4S LiPo operating range assumed as 12.0 V depleted to 16.8 V fully charged.
XT60 input, 8 A series fuse, manual series power switch, 2200 uF / 25 V bulk capacitor.
Servo Power Switching
P-channel MOSFET high-side switch on protected battery rail.
10k gate-to-source default-OFF resistor.
2N2222 pulls the MOSFET gate low; base driven through 1k from GPIO23.
Switched battery and GND exit through a high-current 2-pin screw terminal.
Logic Supply
Compact MP1584-style module interface, 12.0-16.8 V input, regulated 5 V output, 3 A target.
5 V powers ESP32 VIN and active buzzer.
Battery Monitor
47k high-side and 10k low-side divider, with 100 nF across the 10k resistor.
At 16.8 V battery, ADC node is approximately 2.95 V.
ADC node connects to GPIO34 (ADC1, input-only).
Interfaces
I2C header: 3.3 V, GND, SDA/GPIO21, SCL/GPIO22.
UART header: GND, TX2/GPIO17, RX2/GPIO16.
Buzzer control: GPIO25 through 1k to 2N2222 base; active 5 V buzzer and 1N4148 flyback diode.
Interfaces and Connections
Table
Interface
Pins / Signals
Battery input
XT60: BAT+, GND
Servo output
SW_SERVO+, GND
IMU
3V3, GND, SDA GPIO21, SCL GPIO22
UART2
GND, TX2 GPIO17, RX2 GPIO16
Buck module
VIN+, VIN-, VOUT+, VOUT-
Power and Runtime Expectations
Battery capacity: 2.2 Ah nominal.
Servo load dominates runtime and is not specified; runtime cannot be predicted until the servo count and worst-case current are known.
8 A fuse is treated as the requested branch limit, not proof that the servo system will remain below 8 A.
Power Tree and Power Budget
Table
Rail
Load
Design Current
Switched battery
Dynamixel servo output
Up to 8 A branch limit; actual peak TBD
5 V
ESP32 DevKit VIN
Allow 1 A peak margin
5 V
Active buzzer
Allow 100 mA
5 V
Expansion/overhead
Remaining module capacity
Buck output total
Logic rail
3 A module target
At 12.0 V battery and 85% efficiency, a full 5 V / 3 A load draws approximately 1.47 A from the battery. Combined with an 8 A servo branch, the upstream switch, connector, fuse holder, copper, and battery wiring should be evaluated for roughly 9.5 A worst-case if both limits are exercised concurrently. The requested 8 A fuse location therefore requires clarification during hardware testing: if it protects the entire board, it may nuisance-trip below the combined theoretical maximum; if it protects only the servo branch, logic remains separately protected.
Manufacturing and Assembly Expectations
Default to SMD passives and semiconductors, with through-hole connectors, fuse holder, power switch, terminal block, ESP32 female headers, electrolytic capacitor, and buck module headers where practical.
High-current copper must be sized after the board stackup and copper weight are approved.
Firmware-Relevant Hardware Requirements
GPIO23: servo rail enable, active high at GPIO causes NPN conduction and servo MOSFET turn-on.
GPIO25: buzzer enable.
GPIO34: battery ADC input.
GPIO21/GPIO22: I2C SDA/SCL.
GPIO17/GPIO16: UART2 TX/RX.
Physical Design Expectations
Bare board; no enclosure constraints provided.
Connector edge assignments, board dimensions, mounting holes, bottom-side component allowance, and stackup remain open and require confirmation before PCB placement.
ESP32 DevKit antenna end must face a board edge with copper/component keepout beneath and in front of the antenna region.
Important Design Decisions
“Unswitched +12 V battery rail” is interpreted as the unswitched/protected 4S battery rail spanning approximately 12.0-16.8 V.
ADC divider is safe at 16.8 V: approximately 2.95 V at GPIO34.
Use a real SMD IRF4905-family variant if available; do not silently attach an SMD footprint to a TO-220-only part.
Assumptions
The requested schematic is for a carrier PCB using a removable 30-pin ESP32 DevKit, not a bare ESP32-WROOM module.
No onboard LiPo charging or cell balancing is included.
No reverse-polarity, TVS, inrush limiting, or current sensing was explicitly requested; design review may recommend these additions.
Dynamixel communication data interface is outside scope; only servo power is included.
Change Notes
Initial requirements imported from the attached text brief.