High-Level Block Diagram Creation
RP2350_DVDD_1V1 命名网络。RP2350_VREG_LX / RP2350_VREG_FB 命名网络,等待按RP2350参考设计补电感/反馈/旁路。PWR_RAW_IN、PWR_IDEAL_DIODE_GATE、PWR_IDEAL_DIODE_VCAP。U_DCDC_3V3:VCCU_DCDC_5V:VCCU7:VCCU6:BST/FB/RON/SW/EN/UVLOU7:SW/BOOT/EN/FBL1:P1/P2本轮完成
当前ERC摘要
未决原因
后续建议
边界