Great. Next, paste this into Flux Autopilot to apply rules, pours, stitching vias, and mounting holes.
Paste this:
- Apply routing rules
- Set minimum trace width to 0.152 mm (6 mil).
- Set preferred trace width to 0.254 mm (10 mil).
- Set minimum clearance to 0.20 mm.
- Set via drill to 0.30 mm and via pad to 0.60 mm.
- Create a POWER net class and assign nets VBUS, BAT, VIN, and 3V3 to width 0.254 mm (10 mil).
- Add ground pours
- Create top and bottom copper polygons covering the whole board and assign them to net GND.
- Set polygon clearance to 0.25 mm and enable thermal reliefs.
- Re-pour both polygons.
- Add stitching vias (avoid keep-outs)
- Place a GND stitching via fence 0.5–0.8 mm inboard from the PCB edge with 3.0 mm spacing around the full perimeter.
- Use via drill 0.30 mm, pad 0.60 mm, connected to GND.
- Do NOT place any vias inside:
- Pull-pin keep-out (center 17.75, 7.50; size 3.5 × 8.0 mm).
- Antenna band keep-out (Y = 10.0 to 15.0 mm).
- Mounting holes
- Add four non-plated mounting holes (NPTH) with 2.0 mm drill at:
- (1.0, 1.0), (18.5, 1.0), (18.5, 14.0), (1.0, 14.0).
- Apply a copper keep-out around each mounting hole on top and bottom copper and solder masks with at least 0.25 mm clearance.
- Verify and report
- Re-pour polygons.
- Run design checks and report any violations related to keep-outs, widths, clearances, or copper-to-edge spacing.
When it finishes, reply with:
Rules/pours/stitching/holes done
Notes
- Keep the antenna band copper-free on both layers (required by the ESP32 module guidance).
- Flux runs DRC continuously; use the Review tab to confirm clearances as you go.
- Keep ground return paths short and direct to avoid coupling noisy currents into sensitive nets; use the solid GND pours and stitching vias to provide a low-impedance return.