Project Started

flux

Revised the design around a TCA8418 keypad scanner: all 20 diodes were removed, the 5×4 matrix now connects only to the scanner, and I²C, INT, RESET, decoupling, and required pull-ups were added. The potentiometer and latching-switch sections remain intact; ERC and legibility checks are clean.

Generated image

The project specification, firmware guide, and bring-up plan were also updated for the TCA8418 architecture. The next priority is reviewing the schematic before starting PCB placement.
R

rainbothjoshua

flux

I’ll inspect the board state first, determine whether placement, routing, or both are incomplete, then run the required auto-layout steps and validate the applied result.

flux

Placement was required—the prior components were mostly off-board—and is now applied as a 5×4 key grid with grouped scanner, controls, and MCU. The board passed routing preflight, so full trace routing is now running.

flux

Both placement and routing were needed.
  • Re-placed all 44 components inside the 160 × 100 mm, 4-layer board.
  • Arranged the 20 keys into a 5×4 grid and grouped the TCA8418, ESP32-S3, analog controls, latching switches, and support passives.
  • Cleared placement overlaps and out-of-bounds errors in the placement validation.
  • Generated 23 fine-pitch neckdowns for the TCA8418.
  • Routing preflight passed with only an informational via-at-SMD adjustment for the TCA8418 exposed pad.
  • Started auto-routing; the partially applied result currently has approximately 126 airwires remaining.
Routing is not complete. The existing auto-route job is paused and can be resumed without discarding its progress. Execution stopped because your ACUs ran out.
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Files

Schematic

Layout

3D View

U1
R5
Resistance
10kΩ
R10
Resistance
10kΩ
R4
Resistance
10kΩ
R8
Resistance
10kΩ
R14
Resistance
10kΩ
R12
Resistance
10kΩ
R3
Resistance
10kΩ
R6
Resistance
10kΩ
R15
Resistance
10kΩ
R7
Resistance
10kΩ
SW22
SW21
R13
Resistance
10kΩ
R1
Resistance
4.7kΩ
R2
Resistance
4.7kΩ
R11
Resistance
10kΩ
R9
Resistance
10kΩ
S5
C3
Capacitance
100nF
S6
S17
S15
S13
RV1
Resistance
10kΩ
S8
S9
U2
S1
S16
S7
S19
S4
S18
S11
S10
S20
RV2
Resistance
10kΩ
S12
C1
Capacitance
100nF
S2
S3
S14
C2
Capacitance
100nF
Project Specification
Project Overview
Educational ESP32-S3 Stream Deck prototype powered through the DevKitC-1 onboard USB connection. All external logic is 3.3 V with common GND.
Architecture
  • U1: ESP32-S3-DEVKITC-1-N16R8V main MCU.
  • U2: TCA8418RTWR dedicated I2C keypad scanner.
  • 20 normally-open B3F-1020 switches arranged as a direct 5-row × 4-column matrix; no matrix diodes.
  • Two filtered 10 kΩ linear potentiometer inputs and two active-low latching inputs.
Text
USB host -> ESP32-S3 DevKitC-1
              |-- I2C_SDA / I2C_SCL --> TCA8418 --> ROW1..ROW5 / COL1..COL4 --> 20 keys
              |-- KEYPAD_INT <--------- TCA8418 event interrupt
              |-- KEYPAD_RST ---------> TCA8418 reset
              |-- ADC_POT1 / ADC_POT2 -> filtered potentiometers
              `-- LATCH1 / LATCH2 -----> active-low switches
TCA8418 Keypad Scanner
  • VCC is connected to 3V3 and GND plus exposed pad are connected to common GND. The device supports 1.65–3.6 V operation.
  • C3 is a local 100 nF ceramic bypass capacitor from VCC to GND.
  • ROW0–ROW4 implement schematic nets ROW1–ROW5; COL0–COL3 implement COL1–COL4. The selected package mapping is ROW0–ROW4 on pins 8–4 and COL0–COL3 on pins 9–12.
  • Unused ROW5–ROW7 and COL4–COL9 have populated 10 kΩ pull-ups to 3V3, as required for unused keypad pins.
  • Matrix scan pins use the TCA8418 internal keypad pull-ups; external pull-ups are not fitted on the active matrix lines.
  • SDA and SCL each have a 4.7 kΩ pull-up to 3V3. I2C pull-up sizing is bus-capacitance dependent.
  • KEYPAD_INT is active-low, open-drain, and has a 10 kΩ pull-up to 3V3.
  • KEYPAD_RST is active-low, MCU-controlled, and has a 10 kΩ pull-up to 3V3. Firmware must assert reset for at least 120 us and allow at least 120 us recovery.
Matrix Connectivity
  • Exactly 20 normally-open switches form five rows by four columns.
  • ROW1..ROW5 and COL1..COL4 connect only between the switches and U2; none connect directly to U1.
  • The previous twenty 1N4148 diodes and KEY_RxCy intermediate nets are obsolete.
MCU Pin Mapping and GPIO Budget

Table

FunctionU1 pinDirection
ADC_POT1GPIO1analog input
ADC_POT2GPIO2analog input
I2C_SDAGPIO8bidirectional I2C data
I2C_SCLGPIO9I2C clock output
KEYPAD_INTGPIO10active-low interrupt input
KEYPAD_RSTGPIO11active-low reset output
LATCH1GPIO13active-low digital input
LATCH2GPIO14active-low digital input
GPIO budget: 8 pins total: two ADC, two I2C, keypad interrupt, keypad reset, and two latch inputs. This frees five pins versus the former 13-pin direct-scan design.
Analog Inputs
  • RV1/RV2: terminal 1 to 3V3, terminal 3 to GND, wiper terminal 2 to ADC_POT1/ADC_POT2.
  • C1/C2: 100 nF ceramic from each ADC net to GND.
Latching Inputs
  • SW21/SW22 use common terminal 2 and throw terminal 1 as an SPST contact to GND; terminal 3 is no-connect.
  • R5/R6 are populated 10 kΩ pull-ups from LATCH1/LATCH2 to 3V3. Open is HIGH and closed is LOW.
Power and Safety
  • Power only through the DevKit onboard USB concept.
  • No 12 V rail and no 5 V or 12 V on GPIO or control nets.
  • The DevKit 5V header and USB GPIO19/20 remain unused.
Firmware Requirements
  • Communicate with U2 by I2C, configure ROW0–ROW4 and COL0–COL3 as the keypad matrix, configure debounce/event behavior, and service the event FIFO when KEYPAD_INT asserts.
  • Do not directly drive matrix rows or sample matrix columns from ESP32 firmware.
  • Read the two ADC inputs and two externally pulled-up latch inputs independently.

  • Project Overview

  • Architecture

  • TCA8418 Keypad Scanner

  • Matrix Connectivity

  • MCU Pin Mapping and GPIO Budget

  • Analog Inputs

  • Latching Inputs

  • Power and Safety

  • Firmware Requirements