Project Start

Thought for 4 mins 12 sec
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Steering PRG32 Console Revision…
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Received notification from "PRG32 Console Revision" that it finished — picking the work back up.

flux

Finalized and verified the Quarkzman speaker polarity:
  • J3 left: pin 1 = L_SPK+, pin 2 = L_SPK−
  • J4 right: pin 1 = R_SPK+, pin 2 = R_SPK−
Both connectors map exclusively to their corresponding MAX98357A differential S+/S− outputs, with no ground connection or left/right short. All obsolete “polarity TBD” silkscreen and documentation were removed; the rear test block and research brief now record the verified result.
Open items
  • J3/J4 are currently 5.00 mm terminal blocks, while the Quarkzman harness is JST‑PH2.0. You will need a short adapter harness, or I can replace J3/J4 with JST‑PH footprints.
  • The board still has 44 expected unrouted airwires; no routing has been performed.
Suggested next steps
  1. Replace J3/J4 with JST‑PH2.0 connectors for direct speaker connection.
  2. Route the board, keeping each speaker differential pair short and matched.
  3. Run final DRC and prepare the manufacturing package.
Use JST-PH connectors
Route speaker interfaces
Prepare manufacturing review
Create bring-up plan
Sign up to send

Files

Schematic

Layout

Preview

Firmware Getting Started
Use ESP-IDF v5.4 with ESP32-C6 support or the repository's prg32-esp32c6 PlatformIO environment. The hardware target is the socketed Waveshare ESP32-C6-DEV-KIT-N8; it is programmed and powered through its retained USB-C connector.
Carrier pin map

Table

PeripheralGPIO
TFT SPIMOSI 7, MISO 2, SCLK 6, CS 10, D/C 1, reset 0, backlight 5
Optional resistive touch SPIshared MOSI 7, MISO 2, SCLK 6; CS 12; IRQ not connected
ControlsUP 3, DOWN 13, LEFT 18, RIGHT 19, START/SELECT 20, A 21, B 22
Stereo I2SBCLK 4, LRCLK 11, DIN 23
Resetdevelopment-board EN/CHIP_PU; not a gameplay GPIO
RGB LEDGPIO8 is disabled; no carrier circuit
The confirmed J5 display socket is a 1×14 2.54 mm female socket for the B082QVKT7M-compatible ILI9341 interface. Its fixed order is VCC, GND, CS, RESET, DC, MOSI, SCK, LED, MISO, T_CLK, T_CS, T_DIN, T_DO, T_IRQ. VCC is 3.3 V. The documented compatible module does not identify the touch-controller IC, so do not select an XPT2046 driver merely from the header labels; inspect the module marking or obtain its vendor documentation first.
Configure all gameplay GPIOs as inputs with internal pull-ups and treat pressed as low. Configure GPIO4/11/23 as the shared I2S TX bus; U2 is wired for left and U3 for right. For the display, configure GPIO5 as a high-active backlight enable/PWM output. If touch support is verified, initialize the TFT with CS high before selecting GPIO12 for a touch transaction; J5 T_IRQ is intentionally unavailable.
Build commands
Bash
idf.py -B build-esp32c6 -D SDKCONFIG=build-esp32c6/sdkconfig -D SDKCONFIG_DEFAULTS=sdkconfig.defaults set-target esp32c6
idf.py -B build-esp32c6 -D SDKCONFIG=build-esp32c6/sdkconfig -D SDKCONFIG_DEFAULTS=sdkconfig.defaults build
idf.py -B build-esp32c6 -D SDKCONFIG=build-esp32c6/sdkconfig -D SDKCONFIG_DEFAULTS=sdkconfig.defaults flash monitor

  • Carrier pin map

  • Build commands