RF Front-End PCB Design
Thought
flux
Work done
- Began the SAR RF front-end migration and successfully removed the legacy Artix-7 FPGA (U11) and obsolete FT230X USB-UART bridge (IC1).
- Added the new iCE40UP5K-SG48 FPGA (U11), FT2232H USB FIFO (IC1), USBLC6-2P6 USB ESD protection (U13), USB-C CC pull-downs, reset support, and decoupling/bulk capacitors.
- Reworked USB-C connectivity so VBUS is on a new +5V_USB net instead of the RF 3.3V rail, added CC1/CC2 5.1kΩ pull-downs, and connected USB D+/D− through the ESD device to the FT2232H.
- Connected the ADC D0-D7 bus and ADC clock to the new iCE40 FPGA, restored SPI flash connectivity to the FPGA, and created the FT2232H FIFO data/control interface nets.
- ✅ Legacy Artix-7 FPGA removed from the schematic and replaced with iCE40UP5K-SG48.
- ⚠️ PCIe cleanup was started, but I could not complete/verify all PCIe connector/circuit/net removal before execution stopped.
- ✅ FT2232H and USB ESD support were added and wired at the schematic level.
- ✅ USB-C VBUS power-net issue was corrected from the observed RF 3.3V tie to a dedicated +5V_USB net.
- ⚠️ Board was previously verified as 70 mm x 50 mm, 4-layer, L2 GND / L3 power, but I could not complete the final layout placement/routing pass.
- ⚠️ ERC/DRC validation could not be completed after the migration edits.
- Continue by verifying/removing any remaining PCIe/FPC artifacts and orphan PCIe nets, then place the new iCE40/FT2232H/USB support components in the required left-to-right layout zones and run ERC/DRC cleanup. After schematic cleanup, proceed to PCB layout placement/routing on the existing 70 mm x 50 mm 4-layer board.
Thought for 8 sec
flux
I see an uploaded file is available, but I don’t have your specific question or the file’s accessible URL in this thread. Please tell me what you want me to do with it—review a datasheet, analyze a BOM, inspect a schematic/PCB file, or import/create a part—and I’ll process it accordingly.
Inspect uploaded file
Import library parts
Review schematic file
Extract datasheet info
