• Operate from two series AAA cells.
• Select 30 min, 1 h, 2 h, or 4 h lock intervals.
• Pulse the motor for approximately 1–2 s in opposite directions to close and open.
• Keep the motor fully off/coasting between pulses; never hold with continuous current.
• Refuse closing when battery voltage is too low to reliably reopen later.
• Open when the timer expires, when the primary button is pressed while locked, or after a ~6 s override hold.
• Gate display power so the UI can fully sleep.
• Optionally confirm opening using an external cam/endstop switch with firmware timeout/retries.

• PY32F002A-family MCU, TSSOP-20 preferred.
• 4-digit common-anode LED timer display with TM1637 driver.
• Two tactile buttons.
• Bidirectional low-voltage H-bridge motor drive.
• Switched battery ADC divider.
• Side-exit motor and endstop connectors.
• SWD-style debug header.
• Safe reset defaults and low sleep current.

Diagram

• Two AAA cells in series, nominally ~3.0 V, connected through two PCB wire pads.
• No regulator in the baseline design; MCU and motor driver operate directly from the battery rail.
• Local MCU decoupling: 100 nF plus 10 µF.
• Local motor-driver decoupling: 100 nF plus 10 µF.
• Gated display rail local decoupling: 100 nF.

• PUYA PY32F002AF15P6TU or compatible PY32F002A TSSOP-20.
• Functions: buttons, endstop, H-bridge control, TM1637 CLK/DIO, display enable, battery-divider enable, battery ADC, NRST, BOOT0, and SWD.
• NRST 10 kΩ pull-up; BOOT0 10 kΩ pull-down; debug header exposes battery, GND, SWDIO, and SWCLK.

• TI DRV8837/DRV8837C-class bidirectional H-bridge preferred.
• VM/VCC from battery, OUT1/OUT2 to motor, IN1/IN2 from MCU.
• 100 kΩ pull-down on both motor inputs for reset-safe OFF/coast behavior.
• Sleep/enable arrangement must guarantee no accidental motor drive during reset and near-zero idle motor current.
• Driver and battery source must tolerate short N20 startup/stall-current pulses; final motor stall current remains a required confirmation.

• TM1637 SOP-20 driving a 0.56-inch four-digit common-anode LED display.
• AO3401-class P-channel MOSFET high-side power gate; 100 kΩ gate pull-up makes display default OFF.
• Two 6×6 mm SMD tactile switches.
• Exact display pinout must be verified against the selected part before PCB routing.

• 100 kΩ / 100 kΩ divider into an MCU ADC input.
• AO3400-class N-MOSFET switches the divider return; 100 kΩ gate pull-down keeps measurement disabled by default.
• Firmware measures battery before CLOSE and applies a conservative reopen reserve threshold.

• Motor: JST-SH 1.0 mm 2-pin right-angle SMD or equivalent.
• Endstop: JST-SH 1.0 mm 2-pin right-angle SMD or equivalent.
• Battery: two wire pads.
• Debug: 1×4, 2.54 mm header.

• Low-power sleep is the dominant idle mode: display rail off, battery divider off, motor disabled/coasting.
• Display operates only briefly after user interaction.
• Motor operates only for ~1–2 s close/open pulses.
• Runtime depends strongly on MCU sleep current, display duty cycle, motor stall/start current, pulse duration, and battery chemistry.

• 85 mm × 55 mm, 2-layer, ~1.6 mm PCB.
• 0603 passives preferred; larger package permitted for 10 µF capacitance retention.
• Practical JLCPCB-style SMT parts and second-source-friendly footprints preferred.
• WSON exposed-pad assembly and inspection require attention.

• Safe GPIO defaults prevent motor activation during reset/programming.
• Battery check occurs before every close command.
• Display is enabled only when needed and disabled before deep sleep.
• Endstop input supports configurable polarity, debounce, timeout, and retry behavior.
• Motor truth table provides explicit CLOSE, OPEN, coast, and forbidden/brake states.
• Countdown persists or fails safely across resets as defined by firmware policy.

• User face: display, Switch A, Switch B, and battery pads; visually clean with no screw heads/spacers.
• Electronics face: MCU, TM1637, H-bridge, MOSFETs, passives, JST connectors, debug header, and four M2 female SMD spacers at least 3 mm high.
• Cables exit sideways at board edges.
• Rear screws enter spacers from the electronics face side arrangement.
• Maintain approximately 8 mm keepout between a THT display and battery zone.
• Short/wide motor-current paths and a solid ground return are required.

• Bidirectional H-bridge retained; a single low-side MOSFET is unacceptable.
• Direct battery operation retained unless voltage-range verification forces a regulator/alternate architecture.
• Display and battery divider are independently power-gated for low sleep current.
• Safe reset behavior is the highest electrical priority.
• Robustness and guaranteed reopening override lowest cost.

• Exact N20 motor stall current and winding resistance will be confirmed before PCB release.
• Endstop electrical polarity and whether an external pull-up is needed will be confirmed.
• Exact close/open pulse duration and retry limits are firmware-tuned mechanical parameters.
• Exact LED display model and pinout will be selected and verified before footprint lock.
• Battery polarity protection is desirable and may be added if voltage drop can be kept acceptably low.

• Complete datasheet-backed schematic with all power, reset, boot, debug, UI, display, measurement, motor, and connector circuitry wired.
• Motor is guaranteed safe-OFF during MCU reset and sleep.
• Opposite-direction pulse control and zero-current idle behavior are supported.
• Battery voltage can be measured with negligible sleep leakage.
• ERC has no unresolved critical errors.
• PCB fits 85 mm × 55 mm, meets face/edge constraints, has no unrouted nets, and passes DRC.

• Initial specification captured from the supplied electronics requirements.