ASCOM Mount Dither

flux

The review package is updated. I’m also refreshing the project specification to match the corrected PhotoMOS/SPST revision.

flux

The project specification is refreshed to the corrected PhotoMOS version. I’m verifying the final file list and marking the revision complete.

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Final ERC/BOM/schematic checks are clean; no PCB placement/routing was started.

flux

Implemented the schematic-only V1 revision: replaced the TLP291-4 with four TLP171A(TP,F) PhotoMOS relays, replaced SW1 with a true SPST ON/OFF switch, preserved the V2 archive, and updated the review docs.
Updated files:
Open items:
  • No PCB placement/routing was started.
  • J1 pin-1 marker and “ST-4 - STRAIGHT 1:1 6P6C ONLY” silkscreen note remain layout-stage tasks.
  • Board outline, connector access, battery-holder position, and mounting method still need definition before placement.
Suggested next steps:
  1. Review/approve the corrected PhotoMOS schematic and BOM.
  2. Confirm SW1 = DS04-254-2-01BK-SMT is acceptable as the physical power switch.
  3. Confirm whether J2 should stay as a 1x03 UPDI header or change to test pads before layout.
Approve and prepare layout
Approve PhotoMOS schematic
Keep UPDI header
Define board outline
Verify RJ12 footprint
Review switch choice
Sign up to send

Files

Schematic

Layout

Preview

USB Host Compatibility Bring-Up Plan — HEM27EC Dither Box
Purpose
This plan validates the assembled HEM27EC Dither Box in the safest order: power first, switched USB VBUS second, USB enumeration third, and iOptron mount protocol last. The main risk is not the ESP32 logic; it is accidentally back-powering or overloading the iOptron 8409/HEM27EC USB interface before the box's USB-host behavior is proven.
Prerequisites
Equipment
  • Current-limited bench supply, 0–6 V, at least 1 A.
  • Digital multimeter.
  • USB power meter or inline USB current monitor.
  • Oscilloscope preferred for 3.3 V / 5 V rail startup and USB VBUS transient checks.
  • 3.3 V USB-UART adapter for J4.
  • Known-good sacrificial USB serial devices:
    • One CDC-ACM adapter/dev board.
    • If possible, one FTDI or CP210x adapter.
  • Dummy USB loads: 50 mA, 100 mA, 250 mA, and up to 500 mA.
  • Protected 1-cell LiPo or battery simulator.
  • PC with lsusb / USBTreeView / Device Manager for identifying the iOptron USB VID/PID and class.
Safety Rules
  • Do not connect the iOptron mount during first power-on.
  • Do not connect a LiPo until charger polarity and rails are verified.
  • Do not enable USB_HOST_PWR_EN until 3V3 is stable and firmware is logging over UART.
  • Treat any host VBUS current above a small USB-serial load as suspicious until understood.
  • Use UART logging; the ESP32-S3 native USB pins are the host port (GPIO19/20) and are not available for USB debug during host tests.
1. Visual Inspection
  • Inspect U2 BQ24074, U3 TPS63020, U4 TPS61023, U5 TPS2051C, U1 ESP32-S3 module, D1 USBLC6, D2/D3 TVS diodes, J1 USB-C, J2 USB-A, and J3 JST-PH battery connector.
  • Confirm J3 battery polarity: BAT_PLUS on J3 P1 and GND on J3 P2.
  • Confirm USB-A J2 D- and D+ are not swapped:
    • J2 D- → D1 I/O1 → R25 22Ω → U1 GPIO19 / USB_HOST_DN.
    • J2 D+ → D1 I/O2 → R26 22Ω → U1 GPIO20 / USB_HOST_DP.
  • Confirm D2 protects CHG_VBUS to GND and D3 protects HOST_VBUS to GND.
  • Confirm R14 100k pulls USB_HOST_PWR_EN low so U4/U5 remain disabled during ESP32 reset.
2. Unpowered Resistance Checks

Table

CheckMeasure betweenExpected resultPass criteria
Charge VBUS shortCHG_VBUS to GNDNot shorted>10 kΩ after capacitors settle
Battery shortBAT_PLUS to GNDNot shorted>10 kΩ after capacitors settle
System rail shortSYS to GNDNot shorted>1 kΩ after capacitors settle
3.3 V short3V3 to GNDNot shorted>1 kΩ after capacitors settle
5 V pre-switch shortHOST_5V_PRE to GNDNot shorted>1 kΩ after capacitors settle
Host VBUS shortHOST_VBUS to GNDNot shorted>1 kΩ after capacitors settle
USB-C CC1J1 CC1 / USB_C_CC1 to GNDR1 pull-down4.8–5.4 kΩ
USB-C CC2J1 CC2 / USB_C_CC2 to GNDR2 pull-down4.8–5.4 kΩ
USB D+ to GNDUSB_HOST_DP_CONN to GNDNot shorted>100 kΩ
USB D- to GNDUSB_HOST_DN_CONN to GNDNot shorted>100 kΩ
3. Power Rail Verification

Table

RailSourceExpected voltageToleranceMeasure atInitial current limitPass criteria
CHG_VBUSJ1 USB-C input5.0 V4.75–5.25 VU2 IN / C18 P1100–200 mAStable, no heating
BAT_PLUSJ3 LiPo / U2 BAT3.0–4.2 Vcell dependentJ3 P1 / U2 BATbattery simulator 200 mACorrect polarity, no excessive current
SYSU2 OUT~battery/USB power-path output3.0–4.4 V typicalU2 OUT / C3 P1200 mAFeeds U3/U4 inputs
3V3U3 TPS630203.3 V±5%U1 3V3 / C10 P1150–250 mA first boot3.135–3.465 V
HOST_5V_PREU4 TPS610235.0 V±5%U4 VOUT / C12 P150–100 mA first enable4.75–5.25 V, no overshoot >5.5 V
HOST_VBUSU5 TPS2051C OUT5.0 V when enabled±5%J2 VUSB / C15 P150 mA first enable4.75–5.25 V, current limited on fault
Procedure
  1. With no battery and no mount, apply 5 V to J1 through a current-limited source or monitored USB-C supply.
  2. Verify CHG_VBUS, then SYS, then 3V3.
  3. Confirm USB_HOST_PWR_EN remains LOW during reset and boot.
  4. Flash the firmware starter over UART on J4.
  5. Confirm firmware logs show 3V3_PGOOD=1 before any host power testing.
  6. Press the user button only after UART logging is active; this is what enables USB_HOST_PWR_EN in the starter firmware.
  7. Measure HOST_5V_PRE and HOST_VBUS startup; abort if overshoot, heating, or USB_HOST_FAULT_N assertion occurs.
4. Critical Signal Verification

Table

SignalNetExpected idle stateMeasure atNotes
ESP32 enableESP_ENHIGH, ~3.3 VU1 EN / J4 RESETS1 pulls low to reset.
ESP32 bootESP_BOOTHIGH, ~3.3 VU1 GPIO0 / J4 NJTRSTS2 pulls low for download mode.
GPIO45 strapESP_GPIO45_STRAPLOWU1 GPIO45 / R18Do not drive.
GPIO46 strapESP_GPIO46_STRAPLOWU1 GPIO46 / R19Do not drive.
3.3 V PG3V3_PGOODHIGH after U3 validU1 GPIO8Firmware requires this before enabling host power.
Host power enableUSB_HOST_PWR_ENLOW at resetU1 GPIO7 / U4 EN / U5 ENHIGH enables U4 and U5.
Host faultUSB_HOST_FAULT_NHIGH if no faultU1 GPIO5 / U5 ~FLTLOW means overcurrent/thermal fault.
Charger input goodCHG_PGOOD_NLOW with valid USB-C inputU1 GPIO15 / U2 ~PGOODActive-low.
Charging statusCHG_STATUS_NLOW while chargingU1 GPIO16 / U2 ~CHGActive-low.
User buttonUSER_BUTTON_NHIGH idle, LOW pressedU1 GPIO4 / S3Firmware toggles host session on press.
Sync inputSYNC_INLOW idleU1 GPIO17J5 Pin 3 through R22; R24 pulldown.
Sync outputSYNC_OUTLOW idleU1 GPIO18 / J5 Pin 43.3 V output through R23.
USB D-USB_HOST_DNUSB full-speed signalingU1 GPIO19 / R25Check continuity only before enumeration.
USB D+USB_HOST_DPUSB full-speed signalingU1 GPIO20 / R26Check continuity only before enumeration.
5. Programming and Debug Interface

Table

InterfaceConnectorSignalsTool
UART bootloader/loggingJ43V3, GND, ESP_TXD0, ESP_RXD0, ESP_BOOT, ESP_ENUSB-UART adapter + PlatformIO / esptool.py
UART Flash Procedure
  1. Connect USB-UART adapter GND to J4 JTCK.
  2. Connect adapter RX to J4 JTDO (ESP_TXD0).
  3. Connect adapter TX to J4 JTMS (ESP_RXD0).
  4. Use J4 JTDI / 3V3 only as a voltage reference unless intentionally powering the board from a current-limited 3.3 V source.
  5. Hold BOOT/S2 low, pulse RESET/S1 low, release RESET, release BOOT.
  6. Run pio run -t upload from the firmware project.
  7. Monitor with pio device monitor -b 115200.
6. USB Host Power Validation Before Any Real Device

Table

TestSetupExpected resultPass criteria
Host off at resetPower board, do not press user buttonUSB_HOST_PWR_EN LOW, HOST_VBUS 0 VNo 5 V at J2 VUSB
No-load enablePress user button with no USB deviceHOST_VBUS rises to 5 V4.75–5.25 V, no fault
50 mA loadDummy load on J2 VBUSStable 5 VNo USB_HOST_FAULT_N assertion
100 mA loadDummy load on J2 VBUSStable 5 VNo fault, no overheating
250 mA loadDummy load on J2 VBUSStable 5 VNo fault if within design target
Fault testControlled overload/short through current-limited setupU5 asserts USB_HOST_FAULT_N lowFirmware disables GPIO7 and VBUS
Reverse/back-power checkMount or external USB source powered, box offNo significant voltage on HOST_5V_PRE/SYSNo backfeeding through U5/ESD path
Do not connect the mount until all rows pass.
7. USB Device Compatibility Tests
Stage A — Known CDC-ACM Device
  1. Set MOUNT_USB_VID/MOUNT_USB_PID in firmware to a known CDC-ACM device.
  2. Rebuild and flash.
  3. Press user button to enable host power and start enumeration.
  4. Pass criteria:
    • HOST_VBUS remains 4.75–5.25 V.
    • USB_HOST_FAULT_N remains HIGH.
    • Logs show CDC device opened.
    • Firmware can transmit a text command and print any received data.
Stage B — Identify the 8409/HEM27EC USB Bridge
Use a PC first, not the dither box:
  • Linux: lsusb and lsusb -v -d VID:PID.
  • Windows: Device Manager, USBTreeView, or Zadig information view.
  • Record:
    • VID/PID.
    • USB class/subclass/protocol.
    • Manufacturer/product strings.
    • Driver used by the PC: CDC-ACM, FTDI, CP210x, CH34x, Prolific, or vendor-specific.
Stage C — First Mount Connection
  1. Power the mount normally as iOptron expects.
  2. Connect a USB current monitor between the box and the mount if possible.
  3. Press user button to enable host power.
  4. Abort if:
    • USB_HOST_FAULT_N goes LOW.
    • Host VBUS current is unexpectedly high.
    • HOST_VBUS collapses below 4.75 V.
    • The mount back-powers the box when host power is disabled.
  5. If the bridge is CDC-ACM and VID/PID are set, confirm enumeration.
  6. Send read-only queries only.
  7. Do not send movement/dither commands in this stage.
8. Mount Protocol Validation

Table

StepCommand typeExpected behaviorPass criteria
1Read-only version/info queryMount replies with text/statusValid response, no movement
2Read-only state/status queryMount reports tracking/slewing/park stateResponse parsed correctly
3Guide-rate or capability query/set, if supportedNo unexpected motionSetting acknowledged or safely rejected
4Tiny Dec-only pulseVery small controlled movementMotion stops immediately, no fault
5Tiny RA/Dec randomized ditherControlled movementMount accepts command and resumes tracking
Firmware must refuse movement if the mount appears parked, slewing, disconnected, in USB fault, or if no valid status response has been received recently.
9. Functional Validation

Table

TestComponents/netsInputExpected outputPass criteria
Status LEDU1 GPIO21, R20, D4Firmware blinkD4 blinksVisible blink and GPIO toggles 0/3.3 V
User buttonS3, USER_BUTTON_NPress/releaseUART logs button pressHIGH idle, LOW pressed
Host enableU1 GPIO7, U4, U5Firmware/user buttonHOST_VBUS turns on/offNo fault, correct voltage
USB faultU5 ~FLT, GPIO5Controlled overloadFirmware disables host powerFault logged, GPIO7 LOW
Charger statusU2 ~PGOOD, ~CHGUSB-C in / battery chargingGPIO15/GPIO16 reflect stateLogs match charger state
Sync inputJ5 Pin 3, R22/R24, GPIO170/3.3 V inputFirmware logs stateNo floating when disconnected
Sync outputGPIO18, R23, J5 Pin 4Firmware toggle0/3.3 V outputSeries resistor limits fault current
USB enumerationJ2, D1, R25/R26, GPIO19/20Known USB serial deviceDevice enumeratesNo VBUS sag/fault
10. Brownout / Hot-Plug Tests
  • USB device hot-plug repeated 20 times with sacrificial USB serial adapter.
  • Host VBUS enable/disable repeated 20 times with no device and with 100 mA dummy load.
  • Charger plugged/unplugged while ESP32 is running.
  • Battery simulator swept from 4.2 V down toward low-battery condition while host VBUS is disabled.
  • Host VBUS enabled only at healthy battery/SYS levels.
  • Verify GPIO7 is driven LOW on every firmware restart, brownout reset, and manual reset.
11. Pass/Fail Summary

Table

SectionResultNotes
Visual inspection[ ] Pass / [ ] Fail
Unpowered resistance checks[ ] Pass / [ ] Fail
Charger/power-path bring-up[ ] Pass / [ ] Fail
3.3 V rail[ ] Pass / [ ] Fail
Firmware flashing/logging[ ] Pass / [ ] Fail
Host 5 V no-load[ ] Pass / [ ] Fail
Host 5 V dummy-load tests[ ] Pass / [ ] Fail
USB fault handling[ ] Pass / [ ] Fail
Known CDC-ACM enumeration[ ] Pass / [ ] Fail
8409 VID/PID/class identified[ ] Pass / [ ] Fail
First mount read-only query[ ] Pass / [ ] Fail
First tiny movement/dither command[ ] Pass / [ ] Fail
Board status: [ ] Ready for field dither testing / [ ] Requires rework or firmware driver changes
Key Risks to Keep Visible
  • The 8409 USB interface may not be CDC-ACM; it may require FTDI/CP210x/CH34x/Prolific/vendor-specific host support.
  • GPIO19/20 are the ESP32-S3 native USB pins; UART debug is required during host-mode testing.
  • USB_HOST_PWR_EN controls both the boost and the VBUS switch; confirm R14 keeps it off during reset.
  • TPS61023 can source enough energy to damage a miswired USB interface; prove U5 current limiting and fault shutdown before connecting the mount.
  • Validate that the mount does not back-power the box and that the box does not unexpectedly power the mount through VBUS.
  • Movement commands must remain disabled until read-only command/response behavior is reliable.

  • Purpose

  • Prerequisites

  • Equipment

  • Safety Rules

  • 1. Visual Inspection

  • 2. Unpowered Resistance Checks

  • 3. Power Rail Verification

  • Procedure

  • 4. Critical Signal Verification

  • 5. Programming and Debug Interface

  • UART Flash Procedure

  • 6. USB Host Power Validation Before Any Real Device

  • 7. USB Device Compatibility Tests

  • Stage A — Known CDC-ACM Device

  • Stage B — Identify the 8409/HEM27EC USB Bridge

  • Stage C — First Mount Connection

  • 8. Mount Protocol Validation

  • 9. Functional Validation

  • 10. Brownout / Hot-Plug Tests

  • 11. Pass/Fail Summary

  • Key Risks to Keep Visible