The design now extends the ATmega328P minimal board with a Quectel BG95M3LA-64-SGNS LTE Cat-M1 / NB-IoT modem block.
Main additions:
BG95M3LA-64-SGNS LTE-M/NB-IoT modem module.
Board-edge SMA connector for the LTE main antenna.
Ultra-low-capacitance RF ESD diode on the LTE antenna feed.
Nano-SIM connector wired to the BG95 1.8 V USIM interface.
USB-C 5 V input connector with CC pull-down resistors.
Input PTC and Schottky protection path.
LMR33630 3 A buck converter generating MODEM_VBAT, nominally 3.8 V.
TXB0104 level shifter between 5 V ATmega UART/control pins and BG95 1.8 V IO.
Power Budget
Assumptions:
USB-C provides 5 V input.
ATmega328P remains powered from the 5 V VCC rail because the existing 16 MHz crystal requires the ATmega to run in the 4.5-5.5 V operating range for full-speed operation.
BG95-M3 modem supply range from datasheet: 3.3-4.3 V, typical 3.8 V.
BG95 LTE Cat-M active current from datasheet is about 193 mA at 21 dBm average active mode, but cellular transmit bursts can require substantially higher instantaneous current. The modem rail is therefore designed as a 3 A-class supply with large local VBAT capacitance.
Power rails:
Table
Rail
Source
Main loads
Design current
USB_VBUS_RAW
USB-C J5
Input path
Up to USB-C source capability
VCC / 5 V
USB-C through F1/D2
ATmega, headers, buck input, level shifter B-side
Design target about 1.8 A peak input for modem bursts
MODEM_VBAT
LMR33630 buck
BG95 VBAT_BB/VBAT_RF
3.8 V nominal, up to 2 A burst target
BG95_1V8
BG95 VDD_EXT
TXB0104 A-side / IO reference
Low-current IO reference only
Worst-case buck input estimate for modem bursts:
Iin ~= (Vout * Iout) / (Vin * efficiency)
Using 3.8 V, 2.0 A, 5.0 V input, 90% efficiency:
Iin ~= (3.8 * 2.0) / (5.0 * 0.90) = 1.69 A
Design note: the currently placed 0805L110WR PTC has 1.1 A hold current and is a placeholder/closest available library match. For production, replace it with a higher-hold-current USB-C input protection device or revise the power budget if modem peak current is lower in the final operating profile.
Layout Decisions
The PCB was resized to 100 mm x 80 mm and changed to a 4-layer stackup:
Top: components and signals
Inner 1: solid ground reference plane
Inner 2: power distribution
Bottom: secondary routing
Placement decisions:
SMA connector J3 is on the right board edge.
BG95 U2 is placed adjacent to J3 for a short LTE RF feed.
RF ESD diode D1 is located on the antenna feed path.
Nano-SIM J4 is close to BG95 SIM pins.
USB-C J5 is on the left board edge.
Input protection and buck power supply are grouped near USB-C and the modem.
ATmega U1, crystal Y1, decoupling, reset network, ISP, and UART breakout remain grouped as a separate MCU section.
Level shifter U4 is between the ATmega and BG95.
Remaining Work Before Fabrication
Route the board, including a controlled 50 ohm LTE antenna trace from BG95 ANT_MAIN to SMA J3.
Use wide copper / planes for MODEM_VBAT and VCC high-current paths.
Select production MPNs for generic passives and the buck inductor, especially L2 and the modem VBAT capacitor bank.
Replace or validate F1 for the actual cellular burst current and thermal derating.
Verify the BG95 hardware design manual for any carrier-specific RF/SIM/ESD recommendations before production release.