Firework Stepper Module

flux

Yes—the right-side RJ45 can be a direct 1:1 parallel pass-through of the COBRA input, while the selector only taps the six channel returns. I’ll add and verify that connector, then size a practical board and place the input on the left, pass-through on the right, three outputs along the bottom, and four corner mounting holes.

flux

The pass-through and full board placement are complete. I’m doing the final placement review now; routing remains intentionally untouched for your approval checkpoint.

flux

PCB placement is complete and ready for review:
  • 120 × 100 mm, four-layer board
  • COBRA input on left; direct 1:1 pass-through on right
  • Three firing-output RJ45s across the bottom
  • Battery connector at the top
  • Four 3.2 mm corner mounting holes
  • All components placed with no unintended overlaps, out-of-board parts, missing footprints, or ERC errors
  • Routing has not started; 248 airwires remain as expected
Please review the placement. Once approved, I’ll configure high-current routing rules, planes, and route the board.
Approve and route PCB
Approve placement
Route power first
Review high-current paths
Check 3D placement

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Project Specification
Project Overview
Status: Schematic complete and PCB placed; routing intentionally not started; prototype safety validation required
An independently powered 18-channel sequential controller for MJG electric initiators. A single COBRA firing output is isolated and measured; each qualified pulse advances and requests exactly one output. The design rejects continuity-test pulses, bounds firing with firmware and an independent hardware monostable, and locks out after channel 18 until power is cycled.
Intended Use
Prototype field controller for supervised fireworks setup and operation by trained users. Initial bring-up and qualification must use dummy resistive loads only. Live-initiator operation is not approved until the applicable safety validation plan is completed; RJ45 pulse-current capability is a prototype-validation item rather than an absolute release blocker.
What the Device Should Do
  • Ignore approximately 30 ms continuity-test pulses.
  • Accept approximately 100 ms firing pulses using a nominal >~70 ms qualification threshold.
  • Require input release before another pulse can be accepted.
  • Request one and only one channel for no more than 100 ms.
  • Advance CH1 through CH18 exactly once, then lock out until reset/power cycle.
  • Default all channel commands and firing enable off during startup, reset, brownout, and firmware failure.
  • Require both the U4 hardware window and external J6 ARM loop before enabling U5.
Main Features
  • U1 STM32G031C8T6 with 18 direct active-high channel GPIOs.
  • U3 TCMT1100 isolated COBRA command input on TRIGGER_ISO_N/PC13.
  • U4 74HC123 hardware firing window, R42=200 kΩ and C12=1 µF, nominal ~100 ms.
  • J6 external ARM loop between FIRE_WINDOW_Q and GLOBAL_FIRE_ENABLE.
  • U5 TPS26630 current limiter, R43=6.04 kΩ, nominal 2.98 A.
  • Protected 5S battery input and U2 3.3 V buck.
  • Three 1-406541-5 firing-output RJ45-style connectors plus J8 COBRA IN and J10 COBRA THRU, all explicitly non-Ethernet.
  • J7 SWD/debug and TP1–TP6 test access.
System Architecture
Diagram



  
    
  
  
    
  



















COBRA cue at J8 RJ45 via J9 return selector
U3 isolated input
U1 pulse qualification and CH1-18 sequence
U4 nominal 100 ms hardware window
J6 external ARM loop
U5 current-limited firing rail
J4 protected node_5S battery 15-21 V
U2 3.3 V buck
J1-J3 non-Ethernet ignition outputs
Hardware Subsystems
Command input
J8 is the non-Ethernet 8P8C/RJ45 COBRA field input. J10 is a direct, non-inverting COBRA THRU / PASS-THROUGH: J8 pin 1→J10 pin 1 through J8 pin 8→J10 pin 8 with no remapping. J8/J10 pins 7 and 8 are permanently paralleled to COBRA_IN_PLUS and cannot be jumper-selected. J8/J10 pins 1 through 6 remain on their individual COBRA_RETURN_SELECT_1 through _6 nets, with J8 feeding J9 selector positions 1 through 6. J9 is a 2x6 header whose opposite row is commoned to COBRA_IN_RETURN; fit exactly one jumper so only one RJ45 return pin is selected. The selected input feeds the unchanged isolated path through R39=3.3 kΩ and D3 transient protection into U3. U3 collector produces active-low TRIGGER_ISO_N, pulled up by R40=10 kΩ and filtered by C11=10 nF. Firmware measures continuous low duration.
Compute and safety control
U1 controls CH1–CH18 directly. External 100 kΩ gate pulldowns R20–R37 keep MOSFETs off. PB9 triggers U4. PB11 drives Q19 through R48 to clamp MONO_RESET_N after channel 18. PB8 shares GLOBAL_FIRE_ENABLE and must remain input/high-impedance so firmware cannot bypass an open J6 ARM loop.
Firing outputs
Q1–Q18 are low-side AONS66614 MOSFETs. J1 pins 1–6 are channels 1–6, J2 pins 1–6 channels 7–12, and J3 pins 1–6 channels 13–18. Pins 7 and 8 on each connector share the positive firing rail.
Power
J4 accepts a protected 5S Li-ion source over the implemented 15–21 V battery range. F1 is 5 A; D1 provides series protection and D2 clamps transients. U2 generates 3V3. U5 is a high-side eFuse/current limiter, not an 18 V regulator.
Interfaces and Connections
  • J4-1 BAT_RAW; J4-2 GND.
  • J8 pins 7/8: COBRA_IN_PLUS (fixed paralleled positive).
  • J8 pins 1–6: return candidates mapped one-for-one to J9 positions 1–6.
  • J10 pins 1–8: direct same-number pass-through from J8 pins 1–8; no inversion or remapping.
  • J9 positions 1–6: exactly one shunt permitted; the selected position connects its J8 return pin to COBRA_IN_RETURN.
  • J6-1 FIRE_WINDOW_Q; J6-2 GLOBAL_FIRE_ENABLE external ARM loop.
  • J1: pins 1–6 CH1–CH6 returns; pins 7/8 positive firing rail.
  • J2: pins 1–6 CH7–CH12 returns; pins 7/8 positive firing rail.
  • J3: pins 1–6 CH13–CH18 returns; pins 7/8 positive firing rail.
  • J7: 1=3V3, 2=GND, 3=SWDIO, 4=SWCLK/BOOT0, 5=NRST.
  • J1–J3 are not Ethernet connectors and must never connect to network/PoE equipment.
Power and Runtime Expectations
Logic standby target is ~70 ms continuous qualification and release requirement.
  • Direct active-high channels: PA0–PA12 for CH1–CH13 and PB0–PB4 for CH14–CH18.
  • PB9 U4 trigger, PB11 lockout inhibit, PB10 lockout LED.
  • PB8 GLOBAL_FIRE_ENABLE must remain high-impedance.
  • SWD through J7; IWDG and BOR enabled and tested.
  • Reset state always all outputs off; volatile sequence returns to CH1.
Physical Design Expectations
PCB is explicitly sized 120 mm × 100 mm with 3 mm rounded corners, a 2.5 mm universal edge keepout, and a Standard 4 Layer stackup: top signal/components, inner-1 ground plane, inner-2 power plane, bottom signal. All components are currently top-side. J8 COBRA IN is on the left edge and J10 COBRA THRU is aligned opposite on the right edge. J1–J3 are evenly distributed along the bottom edge. Four 3.2 mm non-plated M3 mounting holes are located at the corners. Battery, ARM, debug, selector, and indicators remain edge-accessible. Placement is complete; routing is intentionally deferred.
Important Design Decisions
  • Direct GPIO control avoids a shared serial output device.
  • Firmware provides >~70 ms qualification, release requirement, one-hot sequence, and 100 ms maximum request.
  • U4 independently bounds the firing window; J6 is a hardware ARM loop; U5 provides current limiting.
  • Lockout after CH18 is firmware-enforced and PB11/Q19 inhibits U4.
  • Firing voltage is battery-dependent; only current is actively limited.
Assumptions
  • MJG bridgewire resistance assumption: 1 Ω ±0.2 Ω.
  • Maximum no-fire current assumption: 0.30 A; minimum all-fire current assumption: 0.60 A per initiator.
  • Protected 5S pack provides 15–21 V and ≥5 A pulse capability.
  • At most three initiators may eventually be connected in parallel per channel, subject to connector-current validation.
  • Exact enclosure, battery connector, ARM switch mechanics, cable type/length, and production test fixture remain to be finalized.
Open Issues and Prototype Validation
RJ45 contact pulse-current validation
The available TE 1-406541-5 source is a customer drawing. It provides a 1.5 A continuous/contact rating but no short-pulse current curve; therefore 1.5 A is not a demonstrated hard limit for a 100 ms firing pulse. Pins 7/8 share positive current, while each channel has one return contact, and U5 permits a nominal 2.98 A.
Prototype-validation item: Test one return contact at the actual 2.98 A current limit using repeated 100 ms pulses. Include worst-case connector/cable aging and ambient temperature; measure voltage drop and contact heating, and inspect the connector, PCB jack, mating plug, and cable for damage. Existing commercial COBRA usage with multiple initiators is relevant field evidence, but it does not automatically qualify this exact connector, PCB jack, mating plug, cable, and current-limiter combination.
Safety validation
The U4 timeout, J6 ARM non-bypass, BOR/watchdog behavior, 30 ms rejection, 100 ms acceptance, one-hot sequencing, current limit, and CH18 lockout require instrumented prototype verification with dummy resistive loads before any live-initiator consideration.
Change Notes
  • Added J10 COBRA THRU / PASS-THROUGH as a strict same-number J8 pin 1–8 extension; the J9 selector tap remains on input pins 1–6 and pins 7/8 remain positive.
  • Completed PCB setup and placement on a 120 × 100 mm Standard 4 Layer board with four M3 NPTH corner holes and required interface/safety silkscreen; routing not started.
  • Replaced the legacy two-pin COBRA input with J8 RJ45 and J9 six-position return selector: pins 7/8 positive, pins 1–6 selectable returns, exactly one jumper permitted. Downstream protection, continuity-compatible loading, isolation, and pulse qualification remain unchanged.
  • Updated power architecture to the actual implemented battery-dependent 15–21 V firing rail with nominal 2.98 A current limit; removed regulated-18 V assumption.
  • Added actual schematic pin/interface mapping and PB8 high-impedance ARM requirement.
  • Corrected the RJ45 assessment: the customer drawing gives a 1.5 A continuous/contact rating but no short-pulse curve; 100 ms capability is a prototype-validation item, not an absolute release blocker. The non-Ethernet warning remains mandatory.
  • Added links in project files to firmware, bring-up, and FMEA evidence.

  • Project Overview

  • Intended Use

  • What the Device Should Do

  • Main Features

  • System Architecture

  • Hardware Subsystems

  • Command input

  • Compute and safety control

  • Firing outputs

  • Power

  • Interfaces and Connections

  • Power and Runtime Expectations

  • Power Tree and Power Budget

  • Manufacturing and Assembly Expectations

  • Firmware-Relevant Hardware Requirements

  • Physical Design Expectations

  • Important Design Decisions

  • Assumptions

  • Open Issues and Prototype Validation

  • RJ45 contact pulse-current validation

  • Safety validation

  • Change Notes

18-Channel Firework Stepper

18-Channel Firework Stepper thumbnail
Battery-powered 18-channel sequential pyrotechnic initiator controller triggered by qualified 18 V COBRA pulses, with three six-channel RJ45 outputs and lockout after channel 18.

Properties

Properties describe core aspects of the project.

Pricing & Availability

Distributor

Qty 1

Arrow

$27.46–$33.85

Digi-Key

$0.27

HQonline

$0.90

LCSC

$2.74–$2.79

Mouser

$31.29

TME

$21.84

Verical

$12.31–$21.40

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