Smart Espresso Scale
Worked for 23 mins 27 sec
Created a project doc
Layout Verification Notes — Smart Espresso Scale
Board set to compact 50 x 80 mm rounded rectangle. Stackup set to Standard 4 Layer.
Completed the PCB layout pass: the board is 50 × 80 mm, 4-layer, placed with the ESP32 antenna intentionally overhanging the top edge, and fully routed with no airwires/overlap/dangling/invalid-layer errors remaining.
Open items:
- U1 still reports a body-over-edge warning; this is intentional for the ESP32 antenna keepout.
- BOM still needs final MPNs for generic resistors/capacitors, L3 inductor, and J4 header; TP1–TP4 were excluded from BOM/PnP.
- Routing used 0.1 mm traces to enter fine-pitch parts, so power paths should be widened/poured before manufacturing.
I documented the verification details in Layout Verification Notes.
Suggested next steps:
- Select final passive/inductor/header MPNs.
- Widen/pour VBUS, BAT, SYS, REG_IN, and 3V3 power paths.
- Verify antenna keepout visually/mechanically.
- Export Gerbers/BOM/PnP once BOM MPNs are finalized.
Finalize BOM and power
Select final MPNs
Widen power paths
Verify RF keepout
Run manufacture export
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Board Bring-Up Plan — Smart Espresso Scale
Prerequisites
- Multimeter, current-limited USB supply, oscilloscope if available, USB-UART adapter, known calibration mass, protected 1S LiPo.
- Firmware: see Firmware Starter.
- Start with no battery connected and no load cell attached.
1. Visual Inspection
- Verify USB-C, BQ24074, TPS63031, ESP32-C3, HX711, TVS/LED polarity, and JST/header orientation.
- Check solder bridges around U3 VQFN and U4 VSON packages.
- Confirm load-cell connector pinout: J3 pin 1=E+, pin 2=E-/GND, pin 3=A+, pin 4=A-.
2. Power Rail Verification
Table
| Rail | Source | Expected | Measure At | Current Limit | Pass Criteria |
|---|---|---|---|---|---|
| VBUS_RAW | USB-C J1 | 5.0V | J1/F1 input | 100mA first power | 4.75–5.25V, no shorts. |
| VBUS | F1 output | 5.0V minus fuse drop | U3 IN / C1 | 100mA first power | Stable input to charger. |
| BAT | J2 / U3 BAT | 3.0–4.2V | TP3 / J2 pin 1 | Battery protected | No reverse polarity. |
| SYS | U3 OUT | Battery or power-path output | C3 / SW3 C | 300mA initial | Present when USB or battery is attached. |
| REG_IN | SW3 output | SYS when switch on | U4 VIN | 300mA initial | Switch controls regulator input. |
| 3V3 | U4 VOUT | 3.3V | TP1 | 300mA initial | 3.20–3.40V, low ripple. |
| HX711_AVDD_EPLUS | R17 output | near 3.3V | J3 pin 1 / U2 AVDD | n/a | Drop across R17 acceptable with load cell. |
Procedure:
- With power off, measure resistance from 3V3, BAT, SYS, VBUS to GND.
- Apply current-limited USB 5V; verify VBUS and U3 status.
- Attach protected LiPo; verify BAT polarity and charger behavior.
- Turn SW3 on; verify 3V3 at TP1 before installing/using firmware.
3. Critical Signal Verification
Table
| Signal | Expected State | Measure At | Notes |
|---|---|---|---|
| ESP_EN | High after RC delay | U1 EN / J5 RST | Reset button pulls low. |
| ESP_BOOT_GPIO9 | High normally | U1 IO9 / J5 SCK | BOOT button pulls low. |
| ESP_STRAP_GPIO2 | High | U1 IO2 | Pull-up added. |
| ESP_STRAP_GPIO8 | High | U1 IO8 | Pull-up added. |
| HX711_DOUT | Pulses/ready low | TP4 | Data-ready signal. |
| HX711_SCK | Low idle | U2 PD_SCK | High >60us powers HX711 down. |
4. Connector and Interface Tests
Table
| Connector | Pins to Verify | Test Method |
|---|---|---|
| J1 USB-C | VBUS/GND/CC1/CC2 | Confirm 5.1k CC pull-downs to GND. |
| J2 Battery | BAT/GND | Confirm polarity before pack insertion. |
| J3 Load cell | E+, E-, A+, A- | Continuity and pinout check with load cell cable. |
| J4 OLED | 3V3, GND, SDA, SCL | I2C scanner / OLED init. |
| J5 Programming | 3V3, GND, UART TX/RX, EN, BOOT | Flash firmware and monitor serial output. |
5. Programming and Debug
- Connect USB-UART adapter to J5: adapter TX -> UART_RXD, adapter RX -> UART_TXD, GND -> GND.
- Hold BOOT, tap RESET/EN, release BOOT.
- Flash using PlatformIO.
- Verify serial monitor at 115200 baud.
6. Functional Validation
Table
| Test | Expected Output | Pass Criteria |
|---|---|---|
| OLED startup | Title/weight/timer/VBAT shown | Display updates without flicker reset. |
| HX711 no-load | Stable near zero after tare | Low drift after warmup. |
| Calibration mass | Weight matches mass after calibration | Within target accuracy after calibration. |
| Tare button | Zeroes displayed weight | Works repeatedly. |
| Mode button | Toggles timer | Timer starts/stops. |
| Battery ADC | Reports VBAT | Within ~5–10% before calibration. |
| Charging LED | On during charge, off/Hi-Z when done | Matches BQ24074 behavior. |
Open Items
- Confirm chosen OLED module is 3.3V compatible.
- Validate charge current and thermals with actual battery capacity.
- Validate HX711 noise with WiFi/BLE enabled vs disabled.
- Add enclosure-level splash protection for espresso use.
Prerequisites
1. Visual Inspection
2. Power Rail Verification
3. Critical Signal Verification
4. Connector and Interface Tests
5. Programming and Debug
6. Functional Validation
Open Items
