Here’s a manufacturing-readiness pass on your design, starting with the BOM and then walking through the rest of the checklist. ## 1) BOM review ### BOM summary - Good news: most populated parts have valid MPNs and current source coverage. - Main blockers are: - Obsolete / unavailable regulator: [U2](https://www.flux.ai/:handle/:documentSlug?fit=U2) - Unavailable crystal: [Y1](https://www.flux.ai/:handle/:documentSlug?fit=Y1) - Missing real MPNs on connectors: [J4](https://www.flux.ai/:handle/:documentSlug?fit=J4), [J5](https://www.flux.ai/:handle/:documentSlug?fit=J5), and review also flags [J2](https://www.flux.ai/:handle/:documentSlug?fit=J2) - Generic / placeholder capacitor: [C2](https://www.flux.ai/:handle/:documentSlug?fit=C2) ### BOM issues to fix first #### Critical sourcing blockers | Item | Issue | Why it matters | Recommended action | |---|---|---:|---| | [U2](https://www.flux.ai/:handle/:documentSlug?fit=U2) | **Obsolete**, stock effectively unavailable | Manufacturing risk / redesign risk | Replace with a currently active LDO | | [Y1](https://www.flux.ai/:handle/:documentSlug?fit=Y1) | **0 stock** in review | Immediate procurement blocker | Replace or pre-approve alternate | | [C2](https://www.flux.ai/:handle/:documentSlug?fit=C2) | Generic part, MPN=`OPT` | Not manufacturable as-is | Assign a real manufacturer + MPN | | [J4](https://www.flux.ai/:handle/:documentSlug?fit=J4) | No MPN | Assembly house cannot source deterministically | Assign exact header part | | [J5](https://www.flux.ai/:handle/:documentSlug?fit=J5) | No MPN | Same as above | Assign exact header part | #### Lower-priority BOM concerns | Item | Issue | Note | |---|---|---| | [J2](https://www.flux.ai/:handle/:documentSlug?fit=J2) | Review says no MPN, schematic shows part name only | Likely property mismatch; verify BOM field mapping | | [MCU_TXD](https://www.flux.ai/:handle/:documentSlug?fit=MCU_TXD), [MCU_RXD](https://www.flux.ai/:handle/:documentSlug?fit=MCU_RXD), [MCU_BOOT](https://www.flux.ai/:handle/:documentSlug?fit=MCU_BOOT) | No stock data | Usually acceptable if these are custom/test pads, but confirm fab footprint is standard | | [IC1](https://www.flux.ai/:handle/:documentSlug?fit=IC1) | Manufacturer shown as TI in BOM context, but project constraint says Espressif ESP32-C3 family | Fix metadata so purchasing docs are clean | ### Cost optimization opportunities | Opportunity | Observation | Likely impact | |---|---|---| | Standard passives already consolidated | [R1](https://www.flux.ai/:handle/:documentSlug?fit=R1), [R3](https://www.flux.ai/:handle/:documentSlug?fit=R3), [R5](https://www.flux.ai/:handle/:documentSlug?fit=R5) share one MPN; [R2](https://www.flux.ai/:handle/:documentSlug?fit=R2), [R4](https://www.flux.ai/:handle/:documentSlug?fit=R4) share one MPN; many capacitors are already grouped | Good | | Review 0805 capacitor mix | [C1](https://www.flux.ai/:handle/:documentSlug?fit=C1), [C17](https://www.flux.ai/:handle/:documentSlug?fit=C17), [C21](https://www.flux.ai/:handle/:documentSlug?fit=C21), [C22](https://www.flux.ai/:handle/:documentSlug?fit=C22), [C30](https://www.flux.ai/:handle/:documentSlug?fit=C30), [C19](https://www.flux.ai/:handle/:documentSlug?fit=C19) are intended as one family, but [C19](https://www.flux.ai/:handle/:documentSlug?fit=C19) shows **12 uF** while the same MPN elsewhere shows **10 uF** | Clean up property inconsistency before release | | Mouser-only dependence on some 1 uF parts | many of the [C3](https://www.flux.ai/:handle/:documentSlug?fit=C3)/[C5](https://www.flux.ai/:handle/:documentSlug?fit=C5)/[C7](https://www.flux.ai/:handle/:documentSlug?fit=C7)-family entries show practical stock mainly at Mouser in review | Consider second-source if volume matters | | RF / specialty parts | [Y2](https://www.flux.ai/:handle/:documentSlug?fit=Y2), [L4](https://www.flux.ai/:handle/:documentSlug?fit=L4), [L1](https://www.flux.ai/:handle/:documentSlug?fit=L1) are more specialized | Keep alternates approved if production scale increases | ### BOM release checklist - Replace obsolete [U2](https://www.flux.ai/:handle/:documentSlug?fit=U2) - Replace unavailable [Y1](https://www.flux.ai/:handle/:documentSlug?fit=Y1) - Convert [C2](https://www.flux.ai/:handle/:documentSlug?fit=C2) from generic to real MPN - Add real MPNs to [J4](https://www.flux.ai/:handle/:documentSlug?fit=J4) and [J5](https://www.flux.ai/:handle/:documentSlug?fit=J5) - Verify BOM property mapping on [J2](https://www.flux.ai/:handle/:documentSlug?fit=J2) - Resolve inconsistent capacitance metadata on [C19](https://www.flux.ai/:handle/:documentSlug?fit=C19) - Correct manufacturer metadata on [IC1](https://www.flux.ai/:handle/:documentSlug?fit=IC1) --- ## 2) Design rule / connectivity review ### Current DRC/ERC status - **53 airwire errors** - **6 single-pin nets** - No missing-footprint errors - No undriven-net errors in the fetched review set ### Connectivity issues found #### Single-pin nets | Net | Finding | Likely meaning | |---|---|---| | `Net 28` | [U1](https://www.flux.ai/:handle/:documentSlug?fit=U1) `XOUT` only | Unused oscillator pin or incomplete crystal connection | | `Net 37` | [U1](https://www.flux.ai/:handle/:documentSlug?fit=U1) `XIN` only | Same concern | | `Net 34` | [J1](https://www.flux.ai/:handle/:documentSlug?fit=J1) `CMD` only | SD interface incomplete / intentionally unused but not marked NC | | `Net 30` | [J1](https://www.flux.ai/:handle/:documentSlug?fit=J1) `DAT2` only | Same | | `Net 36` | [J1](https://www.flux.ai/:handle/:documentSlug?fit=J1) `CD` only | Card-detect left floating or unused | | `Net 7` | [Y2](https://www.flux.ai/:handle/:documentSlug?fit=Y2) pin `2` only | Antenna second pad likely intentionally floating depending on footprint, but verify against datasheet/land pattern intent | ### Manufacturing implication - The board is **not layout-ready** yet because of the large airwire count. - The single-pin nets need to be explicitly resolved: - If intentional, mark or document them properly. - If accidental, finish the schematic/net definitions before fab release. ### Priority actions - Close all airwires before generating fabrication outputs. - Verify whether [U1](https://www.flux.ai/:handle/:documentSlug?fit=U1) crystal-related pins are intentionally unused. - Verify whether unused pins on [J1](https://www.flux.ai/:handle/:documentSlug?fit=J1) should be NC or connected. - Verify whether [Y2](https://www.flux.ai/:handle/:documentSlug?fit=Y2) pad 2 is intentionally unconnected per its recommended layout. --- ## 3) Passive consolidation opportunities ### Already well consolidated | Value family | Consolidation status | |---|---| | 10 kΩ 0402 | Good: [R1](https://www.flux.ai/:handle/:documentSlug?fit=R1), [R3](https://www.flux.ai/:handle/:documentSlug?fit=R3), [R5](https://www.flux.ai/:handle/:documentSlug?fit=R5) | | 100 Ω 0402 | Good: [R2](https://www.flux.ai/:handle/:documentSlug?fit=R2), [R4](https://www.flux.ai/:handle/:documentSlug?fit=R4) | | 1 uF 0402 | Good: [C3](https://www.flux.ai/:handle/:documentSlug?fit=C3), [C5](https://www.flux.ai/:handle/:documentSlug?fit=C5), [C7](https://www.flux.ai/:handle/:documentSlug?fit=C7), [C9](https://www.flux.ai/:handle/:documentSlug?fit=C9), [C10](https://www.flux.ai/:handle/:documentSlug?fit=C10), [C11](https://www.flux.ai/:handle/:documentSlug?fit=C11), [C12](https://www.flux.ai/:handle/:documentSlug?fit=C12), [C13](https://www.flux.ai/:handle/:documentSlug?fit=C13), [C15](https://www.flux.ai/:handle/:documentSlug?fit=C15), [C18](https://www.flux.ai/:handle/:documentSlug?fit=C18), [C20](https://www.flux.ai/:handle/:documentSlug?fit=C20), [C24](https://www.flux.ai/:handle/:documentSlug?fit=C24) | | 100 nF 0402 | Good: [C23](https://www.flux.ai/:handle/:documentSlug?fit=C23), [C28](https://www.flux.ai/:handle/:documentSlug?fit=C28), [C31](https://www.flux.ai/:handle/:documentSlug?fit=C31) | | 13 pF 0402 | Good: [C4](https://www.flux.ai/:handle/:documentSlug?fit=C4), [C8](https://www.flux.ai/:handle/:documentSlug?fit=C8) | | 10 uF 0805 family | Mostly consolidated, but property mismatch exists on [C19](https://www.flux.ai/:handle/:documentSlug?fit=C19) | ### Consolidation candidates - Replace placeholder [C2](https://www.flux.ai/:handle/:documentSlug?fit=C2) with a real stocked MPN and see whether it can share a family already used elsewhere. - Normalize [C19](https://www.flux.ai/:handle/:documentSlug?fit=C19) metadata to match the rest of its MPN group if it is truly the same part. - Consider whether [C27](https://www.flux.ai/:handle/:documentSlug?fit=C27) and [C29](https://www.flux.ai/:handle/:documentSlug?fit=C29) can share the same approved AVL as other bulk input caps in your purchasing flow. ### Verdict - Passive consolidation is **mostly good already**. - Biggest win is not part-count reduction, but **cleanup of placeholder/inconsistent metadata**. --- ## 4) Footprint / package verification for assembly ### What looks good - Review reports **no missing footprints**. - The following critical parts have assigned footprints/models in layout: - [IC1](https://www.flux.ai/:handle/:documentSlug?fit=IC1) - [U1](https://www.flux.ai/:handle/:documentSlug?fit=U1) - [U2](https://www.flux.ai/:handle/:documentSlug?fit=U2) - [U3](https://www.flux.ai/:handle/:documentSlug?fit=U3) - [J1](https://www.flux.ai/:handle/:documentSlug?fit=J1) - [J2](https://www.flux.ai/:handle/:documentSlug?fit=J2) - [J3](https://www.flux.ai/:handle/:documentSlug?fit=J3) - [J4](https://www.flux.ai/:handle/:documentSlug?fit=J4) - [J5](https://www.flux.ai/:handle/:documentSlug?fit=J5) - [Y1](https://www.flux.ai/:handle/:documentSlug?fit=Y1) - [Y2](https://www.flux.ai/:handle/:documentSlug?fit=Y2) - [L3](https://www.flux.ai/:handle/:documentSlug?fit=L3) ### Items needing manual verification before release | Item | Concern | Check | |---|---|---| | [C2](https://www.flux.ai/:handle/:documentSlug?fit=C2) | Generic placeholder with 0603 package only | Confirm the intended footprint and source part exactly match | | [IC1](https://www.flux.ai/:handle/:documentSlug?fit=IC1) | Part naming/metadata inconsistency | Confirm exact ESP32-C3 package and land pattern | | [U2](https://www.flux.ai/:handle/:documentSlug?fit=U2) | Footprint exists, but part is obsolete anyway | Re-verify footprint after replacement | | [J4](https://www.flux.ai/:handle/:documentSlug?fit=J4), [J5](https://www.flux.ai/:handle/:documentSlug?fit=J5) | Generic headers | Confirm the exact hole size, pitch, and assembly style required | | [J1](https://www.flux.ai/:handle/:documentSlug?fit=J1) | Placed on inverted side | Confirm assembly side and stencil expectations | | [Y2](https://www.flux.ai/:handle/:documentSlug?fit=Y2) | RF antenna footprint is sensitive | Verify keepout/orientation against vendor land pattern | | [Y1](https://www.flux.ai/:handle/:documentSlug?fit=Y1) | Needs replacement due to availability | Recheck pad geometry if alternate selected | ### Footprint release verdict - **No missing footprints** - But footprint verification is **not complete** until placeholder and generic parts are replaced with final production MPNs. --- ## 5) Board bring-up test plan ### Bring-up goals - Confirm no shorts - Verify power rails - Confirm boot/debug access - Confirm MCU operation - Confirm ADC/load-cell path - Confirm storage and GPIO interfaces ### Suggested bring-up sequence #### Stage 1 - Pre-power inspection - Visual inspection under microscope - Check polarity/orientation for ICs, connectors, and polarized placement assumptions - Measure resistance from each power rail to GND with power off - Confirm no solder bridging on fine-pitch devices: - [IC1](https://www.flux.ai/:handle/:documentSlug?fit=IC1) - [U1](https://www.flux.ai/:handle/:documentSlug?fit=U1) - [U2](https://www.flux.ai/:handle/:documentSlug?fit=U2) - [U3](https://www.flux.ai/:handle/:documentSlug?fit=U3) #### Stage 2 - First power-on - Power from current-limited bench supply through [J2](https://www.flux.ai/:handle/:documentSlug?fit=J2) - Start with low current limit - Check rails in order: - `PP12V0` - `PP5V0` - `PP3V3` - Verify regulator outputs and ripple with oscilloscope #### Stage 3 - MCU access - Use [MCU_TXD](https://www.flux.ai/:handle/:documentSlug?fit=MCU_TXD), [MCU_RXD](https://www.flux.ai/:handle/:documentSlug?fit=MCU_RXD), and [MCU_BOOT](https://www.flux.ai/:handle/:documentSlug?fit=MCU_BOOT) - Confirm boot mode entry - Confirm serial download / flashing - Run minimal firmware: - heartbeat GPIO - UART banner - ADC interrupt visibility #### Stage 4 - Peripheral checks - Verify I2C pull-ups and bus activity on: - [R1](https://www.flux.ai/:handle/:documentSlug?fit=R1) - [R5](https://www.flux.ai/:handle/:documentSlug?fit=R5) - Confirm [U1](https://www.flux.ai/:handle/:documentSlug?fit=U1) responds over I2C - Check `INT_ADC_DRDY` interrupt behavior - Validate load-cell input path through [J3](https://www.flux.ai/:handle/:documentSlug?fit=J3) - Validate switch/header interface on [J4](https://www.flux.ai/:handle/:documentSlug?fit=J4) and [J5](https://www.flux.ai/:handle/:documentSlug?fit=J5) - Validate MicroSD interface on [J1](https://www.flux.ai/:handle/:documentSlug?fit=J1) if intended for first spin #### Stage 5 - Functional calibration - Zero-scale reading - Known weight calibration - Noise floor measurement - Repeatability test - Long-duration drift test - Brownout / power-cycle test ### Bring-up checklist table | Test | Pass criterion | |---|---| | Visual inspection | No tombstones, bridges, missing parts | | Rail shorts | No low-ohmic short to GND on primary rails | | 12 V input | Stable at connector input | | 5 V rail | Present and within tolerance | | 3.3 V rail | Present and within tolerance | | MCU boot | Device enters boot/program mode | | UART | Boot logs / firmware banner visible | | I2C | ACK from ADC | | ADC DRDY | Interrupt toggles as expected | | Load-cell input | Stable raw readings with no load | | Calibration | Known-mass reading within target error | | Reboot behavior | Clean restart across repeated cycles | --- ## Overall manufacturing readiness verdict ### Status - **Not ready for fabrication release yet** ### Must-fix before release - Resolve sourcing blockers: [U2](https://www.flux.ai/:handle/:documentSlug?fit=U2), [Y1](https://www.flux.ai/:handle/:documentSlug?fit=Y1), [C2](https://www.flux.ai/:handle/:documentSlug?fit=C2), [J4](https://www.flux.ai/:handle/:documentSlug?fit=J4), [J5](https://www.flux.ai/:handle/:documentSlug?fit=J5) - Close **53 airwires** - Resolve or intentionally document the **6 single-pin nets** - Clean BOM metadata inconsistencies, especially [C19](https://www.flux.ai/:handle/:documentSlug?fit=C19), [J2](https://www.flux.ai/:handle/:documentSlug?fit=J2), and [IC1](https://www.flux.ai/:handle/:documentSlug?fit=IC1) If you want, I can do the next pass as a **release blocker list ranked by severity** or help you **identify replacement candidates for [U2](https://www.flux.ai/:handle/:documentSlug?fit=U2) and [Y1](https://www.flux.ai/:handle/:documentSlug?fit=Y1)**.