Increased the schematic from 17 components / 0 nets to 30 components / 35 nets.
Replaced the incorrect 4-contact modular-jack approach with custom CB-6P6C-12MM-STAGGER connector parts.
Added the requested bare 1×8 RJ45-breakout header representation.
Added necessary resistors, capacitors, mounting holes, and updated transient protection.
Preserved the socketed ESP32, dual TB6612FNG modules, buck interface, fuse, and reverse-polarity protection.
However, I could not perform the required independent reconciliation and final ERC inspection. The project context still lists an Alternative Tomato Interocitor instance, which may be an unresolved placeholder, and I have not independently confirmed:
Motor outputs land exclusively on 6P6C contacts 3 and 4.
All six connector pads match the supplied staggered geometry and component-side numbering.
The 1×8 breakout pinout matches the specification.
Every unused connector contact is marked NC.
All 35 nets are correct and ERC has no critical findings.
The added passives are limited to electrically justified parts.
The specification, power budget, bring-up plan, and firmware file were fully updated.
One important design constraint remains: the Pololu TB6612FNG carrier is approximately 1 A continuous per channel, so it must not be treated as a 2 A continuous motor driver. Motor stall current must either remain brief and within the module’s peak/thermal limits, or the drivers need upgrading.
I couldn’t inspect or modify the PCB during this turn, so no auto-placement or auto-routing was run and the board remains unchanged. Placement/routing status and DRC therefore still need to be assessed before applying layout changes.
The schematic has been arranged automatically. Flux can redraw it to be more readable, with components placed in related groups and wires drawn more legibly. This takes about 10-60 mins.
Project Specification
Status: Review — component and footprint verification in progress
Project Overview
Chakra Brain is a rugged, serviceable carrier/interconnect PCB for a student robotics kit. It hosts replaceable breakout modules in female sockets rather than bare ICs: one 38-pin ESP32 DevKit, two TB6612FNG dual motor-driver modules, and one adjustable buck-converter module.
Intended Use
Student robotics prototype and validation board.
Assembly and module replacement by users with limited electronics experience.
Initial prototype batch: 5–10 boards.
Reliability and serviceability take priority over compactness or minimum cost.
What the Device Should Do
Control four brushed DC motors from two dual H-bridge modules.
Read four remote joystick axes and three external sensor signals.
Accept a protected 2S 18650 battery pack.
Distribute raw battery voltage to motor power and regulated power to logic.
Allow all active modules to be replaced without desoldering the carrier board.
Main Features
Socketed 38-pin ESP32 DevKit.
Two socketed TB6612FNG breakout modules.
Socketed adjustable buck module, nominally configured for 5.25 V.
Four 6P4C modular motor connectors and three 6P4C modular sensor connectors.
One 8P8C modular remote connector.
Keyed battery input and external master switch connection.
Clear connector and pin-1 silkscreen labels.
System Architecture
Diagram
Hardware Subsystems
Power Input and Distribution
Input: 2S lithium battery pack, nominal 7.4 V, maximum 8.4 V.
Battery positive passes through a keyed connector and external master switch.
Switched battery voltage feeds both motor-driver VM inputs and the buck input.
All grounds share one common ground net.
Reverse-polarity, overcurrent, and transient protection are to be evaluated during verification.
Compute and Control
ESP32 38-pin DevKit with frozen GPIO assignments.
USB serial programming remains available on the DevKit itself.
Motor Control
Two TB6612FNG breakout modules, each controlling two motor ports.
Shared STBY controlled by GPIO25.
Local 220–470 µF bulk and 100 nF ceramic capacitors at each motor module VM input.
External Interfaces
REMOTE: 8P8C straight-through cable carrying GND, 3.3 V, and four analog joystick signals.
M1–M4: 6P4C connectors with doubled contacts for each motor conductor.
SENSOR1–SENSOR3: 6P4C connectors carrying GND, 3.3 V, and one signal.
Interfaces and Connections
ESP32 GPIO Assignment
Table
GPIO
Function
32
Left joystick X
33
Left joystick Y
34
Right joystick X
35
Right joystick Y
16,13,14
Driver 1 PWMA, AIN1, AIN2
19,17,18
Driver 1 PWMB, BIN1, BIN2
23,21,22
Driver 2 PWMA, AIN1, AIN2
27,26,4
Driver 2 PWMB, BIN1, BIN2
25
Shared STBY
36
Sensor 1 signal
39
Sensor 2 signal
15
Sensor 3 signal
GPIO0, GPIO2, GPIO12, GPIO1, GPIO3, GPIO6–11, and EN are reserved and shall not be assigned to external functions.
Battery charging and BMS are outside this board revision.
The carrier must tolerate the full protected 2S battery range.
Runtime is determined primarily by battery capacity and motor duty cycle and is not yet specified.
Power Tree and Power Budget
Table
Path
Voltage
Design Load / Assumption
Raw VM trunk
6.0–8.4 V
Up to four motors; original brief assumes 2 A stall per motor
Each TB6612 channel
Raw VM
Must be checked against actual module and driver peak/continuous ratings
Buck output
5.25 V nominal
ESP32 VIN, both driver logic rails, remote joystick power
ESP32 3.3 V output
3.3 V
Remote joystick axes and three sensor ports; external load limit must be defined
Critical verification item: the original 2 A-per-motor stall assumption may exceed the TB6612FNG’s practical continuous channel rating and must be reconciled before PCB layout.
Manufacturing and Assembly Expectations
2-layer, 1.6 mm FR-4, 1 oz copper.
HASL finish; through-hole/socketed construction favored for forgiving hand assembly.
Standard fabrication rules; no blind/buried vias or controlled impedance.
Target manufacturer capability: standard low-cost prototype PCB process.
Firmware-Relevant Hardware Requirements
PWM-capable outputs drive four motor channels.
Four ADC1 joystick inputs avoid Wi-Fi/ADC2 conflicts.
Three sensor inputs are fixed to GPIO36, GPIO39, and GPIO15.
Firmware must assert GPIO25 to enable both motor drivers.
Firmware should keep motors disabled during boot until GPIO direction states are initialized.
Physical Design Expectations
Starting board envelope approximately 120 mm × 90 mm, to be revised after exact footprint and enclosure checks.
Four 3.2 mm M3 mounting holes near corners.
Motor/power and logic/analog zones must remain physically separated.
No motor-current route may run parallel to joystick analog routes.
Ground pours on both layers with stitching vias approximately every 10 mm.
Minimum planned widths: motor outputs 0.75 mm; shared VM trunk 1.5 mm; 5.25 V rail 0.5 mm.
Important Design Decisions
All active modules are socketed via 2.54 mm female headers.
GPIO assignments and external connector pinouts are frozen.
Common ground is used across motor and logic domains, with zoning and return-path control rather than split grounds.
Conservative, standard construction is preferred over density.
Assumptions and Open Verification Items
Exact ESP32 DevKit, TB6612 breakout, buck-module, modular-jack, battery-connector, and switch connector variants are not yet frozen.
Pin numbering must be verified from the mating-face orientation and selected jack datasheets.
The master switch is presumed panel-mounted and connected by a board connector or wire pads, not mechanically mounted on the PCB.
The minimum 2S battery voltage and BMS cutoff are assumed to be approximately 6.0 V until the battery pack is selected.
External sensor current consumption is not specified.
Change Notes
Initial specification imported from the supplied Chakra Brain design brief.
Component ratings, exact footprints, protection, and power budget marked for engineering verification before layout.