Edge13 Schematic Review


The PCB Placement Pass was already reconciled against the live board; no additional project changes were made this session.
Verified state:
  • All 134 footprints are placed: 81 top / 53 bottom
  • J3 USB-C: (27, −32.9) mm, bottom edge
  • J4 USB-A: (44.72, −21) mm, right edge
  • J5 USB-B: (−44.5, −21) mm, left edge
  • BT1: provisional bottom-side placement at (0, 2) mm
  • J1/J2 remain locked at (±17, 12.5) mm, 90° rotation, preserving the official 34 mm CM5 spacing
  • Board remains 110 × 75 mm, four copper layers
  • No reported component-body overlaps or out-of-bounds footprints
  • No routed traces exist; 285 airwires remain
  • The 18 pre-existing legacy GND via nodes remain
Remaining issues:
  • BT1’s 94.6 × 26 mm body conflicts with the fixed CM5/antenna region. Its position cannot be accepted until enclosure and vertical-clearance geometry are resolved.
  • D3 retains a library/differential-pair warning that must be reviewed before USB routing.
  • Routing congestion is expected near J1, U5, R17, R18, and TP11.
  • Connector plug/enclosure clearance has been planned geometrically but still requires enclosure-level validation.
Execution stopped because your ACUs ran out.
Received notification from "PCB Placement Pass" that it finished — picking the work back up.
The PCB Placement Pass was already fully reconciled against the live board. This is a duplicate completion notification, so no further changes were made.
Placement is complete; remaining unresolved items are the provisional BT1/CM5 mechanical conflict, the D3 USB warning, and enclosure-level connector clearance validation. No routing or schematic changes were performed.
stop all work
Stopped. No further project changes will be made.
Received notification from "PCB Placement Pass" that it finished — picking the work back up.
This is a duplicate completion notification. The placement pass was already reconciled, and the user subsequently ordered all work stopped. No further inspection, placement, routing, or project changes were performed.

U5
U1
J2
U2
Manufacturer Part Number
TPS259470ARPWR
D2
U4
D1
C24
J3
D3
J1
R28
Resistance
205kΩ
R14
Resistance
100kΩ
R4
Resistance
453Ω
R6
Resistance
475Ω
R13
Resistance
255kΩ
R23
Resistance
2.2kΩ
R11
Resistance
182kΩ
R7
Resistance
191Ω
R29
Resistance
1.02kΩ
R31
Resistance
100kΩ
R15
Resistance
8.2kΩ
R2
Resistance
100kΩ
R26
Resistance
715kΩ
R17
Resistance
4.7kΩ
R36
Resistance
27Ω
R20
Resistance
10kΩ
R10
Resistance
5.36kΩ
R34
Resistance
5MΩ
R22
Resistance
2.2kΩ
R27
Resistance
71.5kΩ
R38
Resistance
31.1kΩ
R8
Resistance
10kΩ
R16
Resistance
4.7kΩ
R3
Resistance
100kΩ
R32
Resistance
330Ω
R33
Resistance
2.2kΩ
R1
Resistance
900kΩ
R5
Resistance
953Ω
R19
Resistance
10kΩ
R25
Resistance
100kΩ
R24
Resistance
1MΩ
R9
Resistance
10kΩ
R35
Resistance
5MΩ
R12
Resistance
56kΩ
R21
Resistance
2.2kΩ
R30
Resistance
100kΩ
R18
Resistance
4.7kΩ
R37
Resistance
27Ω
J4
TP16
Q4
TP20
TP17
TP3
TP19
TP6
TP2
TP14
TP1
Q2
TP4
TP10
TP15
Q3
TP9
TP8
TP18
TP5
TP12
TP7
TP13
Q5
TP11
C31
Capacitance
470nF
C38
Capacitance
100nF
C39
Capacitance
47pF
C18
Capacitance
22uF
C22
Capacitance
100nF
C10
Capacitance
22uF
C28
Capacitance
4.7uF
C29
Capacitance
1uF
C26
Capacitance
100nF
C42
Capacitance
100nF
C8
Capacitance
10uF
C41
Capacitance
10nF
C25
Capacitance
100nF
C35
Capacitance
100nF
C1
Capacitance
100nF
C36
Capacitance
2nF
C17
Capacitance
22uF
C19
Capacitance
10nF
C21
Capacitance
100nF
C20
Capacitance
100pF
C23
Capacitance
1uF
C33
Capacitance
100nF
C15
Capacitance
22uF
C16
Capacitance
22uF
C34
Capacitance
100nF
C11
Capacitance
100nF
C37
Capacitance
2.2nF
C5
Capacitance
4.7uF
C30
Capacitance
1uF
C6
Capacitance
47nF
C3
Capacitance
1uF
C9
Capacitance
22uF
C43
Capacitance
100nF
C32
Capacitance
100nF
C40
Capacitance
47pF
C27
Capacitance
100nF
C14
Capacitance
47nF
C12
Capacitance
1uF
C7
Capacitance
22uF
C4
Capacitance
10uF
C2
Capacitance
1uF
C13
Capacitance
100nF
SW1
U12
U7
D4
L2
LED1
U11
U8
Manufacturer Part Number
BQ29728DSET
U13
Q6
U9
U14
U10
Q1
L1
Inductance
1.5µH
BT1
U3
J5
TH1
Resistance
10kΩ
U6
Project Specification
Project Overview
  • Product: Edge13 AIS Data Gateway Mainboard Rev A
  • Status: Draft — pre-layout engineering review
  • Clean-sheet single-board carrier replacing the prior Raspberry Pi Zero / PiSugar / interface-board stack.
  • Compute platform: removable Raspberry Pi Compute Module 5, CM5102032 (wireless, 2 GB RAM, 32 GB eMMC).
Intended Use
  • Small unattended Linux/.NET appliance installed aboard commercial vessels.
  • Receives existing NMEA/AIS via USB, processes and stores data locally, sends a serial stream to a Rose Point laptop, and uploads over Wi-Fi when available.
  • Prototype is not navigation-critical and does not claim IEC 60945 compliance, but should follow robust embedded/industrial practices.
What the Device Should Do
  • Operate from ordinary 5 V USB-C chargers or computer ports without assuming 3 A capability.
  • Continue through short input-power interruptions from one protected, replaceable 21700 Li-ion cell.
  • Allow Linux to perform orderly low-battery shutdown and automatically restart when external power returns.
  • Provide one service USB connection for eMMC recovery, debug, and future gadget modes.
  • Expose only the required product interfaces and indicators.
Main Features
  • CM5 with two Hirose DF40C-100DS-0.4V(51) connectors and four M2.5 module mounts.
  • DATA IN: right-angle USB-A female host port, USB 2.0 data, protected/current-limited VBUS near 500 mA.
  • ROSEPOINT: right-angle full-size USB-B female through FT231XS-R; outgoing CM5 UART presented as USB serial with no system-power backfeed.
  • SERVICE / POWER: one USB-C receptacle, 5 V sink/UFP, CM5 USB 2.0 OTG/device connection, nRPI_BOOT recovery provision.
  • Type-C source-current detection, protected USB input, standalone charger/power path, 21700 battery protection, 5.1 V boost, MAX17048 gauge, RTC backup, power-return wake logic, one button, one intentionally dim RGB LED.
System Architecture

Diagram


SERVICE / POWER USB-C TUSB320 Type-C Detection TPS259470 Input Protection BQ25616 Charger / Power Path Protected 21700 Cell MAX17048 Fuel Gauge TPS61088 5.1 V Boost Compute Module 5 DATA IN USB-A Host UART TX FT231X USB Serial ROSEPOINT USB-B Onboard Wi-Fi / Optional U.FL-SMA
Hardware Subsystems
Compute
  • CM5102032 removable module; no microSD, HDMI, MIPI, PCIe/M.2, Ethernet, 40-pin header, audio, or display connectors.
USB and Serial
  • USB-A host input with ESD and protected 500 mA-class VBUS switch.
  • USB-C service/device interface with USB 2.0 differential routing and recovery boot access.
  • FT231XS-R USB device bridge driven primarily by CM5 UART TX; Rose Point VBUS used only for device detection/supply requirements and isolated from the system 5 V rail.
Power and Battery
  • TUSB320LAI current advertisement detection drives hardware input-current selection.
  • TPS259470 eFuse immediately after USB-C VBUS.
  • BQ25616 standalone 1-cell charger/power path, nominal charge current about 1.5 A subject to analysis.
  • One Molicel INR21700-P45B in PCB holder, with reverse insertion protection and independent BQ2970-family protection plus back-to-back MOSFETs.
  • TPS61088 synchronous boost to 5.1 V, minimum 3 A continuous design target with transient margin.
  • MAX17048 gauge on I2C with ALERT to GPIO.
Control, RTC, and Status
  • CM5 PWR_BUT button and gated external-power-return wake pulse only while CM5 is off.
  • CM5 RTC backed from protected battery through an ultra-low-IQ regulator compatible with VBAT limits.
  • One common-anode RGB LED, dimmed for a dark wheelhouse; use CM5 LED_nPWR/LED_nACT where useful and buffer as required.
Interfaces and Connections
  • External connectors are limited to DATA IN USB-A, ROSEPOINT USB-B, and SERVICE / POWER USB-C.
  • Internal/test provisions include nRPI_BOOT, PWR_BUT, PMIC_EN, power-present, gauge ALERT, UART and FTDI signals, and specified power rails.
  • Optional CM5 U.FL to enclosure SMA pigtail; no second RF switch.
Power and Runtime Expectations
  • Source: ordinary 5 V USB-C; no USB-PD high-voltage modes.
  • Battery: standard 4.2 V-charge 21700 Li-ion, validated with P45B 4.5 Ah cell.
  • Runtime objective: approximately 1–2+ hours under normal Edge13 workload.
  • Battery may supplement a weak source; input must not exceed advertised Type-C current.
  • Linux initiates orderly shutdown around 10–15% SOC; hardware protection is the final deep-discharge safeguard.
Power Tree and Power Budget
  • Detailed worst-case rail/load/current, charger, boost, thermal, and runtime calculations will be maintained in the pre-layout design review.
  • All power-path ratings must be derived from worst-case minimum battery voltage, CM5/peripheral peaks, conversion efficiency, cable drop, thermal limits, and MLCC derating.
Manufacturing and Assembly Expectations
  • Low-volume professional PCBA, initially JLCPCB/LCSC-oriented.
  • At least four layers, 1 oz copper minimum unless analysis justifies more.
  • Prefer stocked, reputable, long-lived parts and verified manufacturer footprints.
  • Post-PCBA work limited to CM5, cell, optional antenna pigtail, enclosure, and thermal hardware.
  • Silkscreen: connector labels, polarity, and EDGE13 MAINBOARD REV A.
Firmware-Relevant Hardware Requirements
  • Raspberry Pi OS / Linux and Edge13 .NET application.
  • Linux reads fuel gauge, controls shutdown policy, and may configure USB gadget and antenna selection.
  • No custom microcontroller firmware; no MCU may be added solely for power management or restart behavior.
Physical Design Expectations
  • Target PCB no larger than about 85–90 mm × 65–70 mm unless mechanically justified.
  • DATA IN and ROSEPOINT preferably on opposite ends; USB-C, power button, and RGB LED in one service area.
  • Four enclosure mounting holes plus four accessible CM5 mounting points.
  • Board-edge external connectors, vibration-resistant battery retention, passive CM5 cooling clearance, and full CM5 antenna keepout.
  • No PCB placement or routing until schematic and pre-layout package are approved.
Important Design Decisions
  • True charger power path plus downstream boost, rather than direct 5 V battery conversion without supplement mode.
  • Hardware Type-C current-capability response at startup.
  • Independent analog battery protection and software-managed orderly shutdown.
  • Power-return wake pulse gated by CM5 power-state indication.
  • Existing CM5 RTC and antenna resources are reused; no redundant RTC or RF switch.
Required Pre-Layout Deliverables
  1. Complete hierarchical schematic and exact CM5 pin allocation.
  2. USB topology, power tree, battery/UPS state diagram.
  3. Worst-case power, charging, battery-current, boost, protection, USB-C current-selection, and thermal calculations.
  4. Complete sourced BOM and approved alternatives.
  5. Mechanical outline/connector plan and antenna keepout plan.
  6. ERC results and explanation for every intentionally unused CM5 pin.
  7. Explicit assumptions and any identified contradictions or safety concerns.
Assumptions
  • Final detailed GPIO choices may be selected from CM5 pins that do not conflict with required USB, UART, I2C, LED, boot, and power-control functions.
  • Exact charge rate, boost component values, battery-protection threshold variant, RTC regulator, logic devices, MOSFETs, TVS arrays, and critical passives remain subject to datasheet, sourcing, thermal, and ERC review.
  • Enclosure material is initially plastic, with optional external antenna provision retained for a future metal enclosure.
Change Notes
  • Rev A begins as a clean-sheet CM5 mainboard and explicitly does not reuse the prior Edge13 Interface Board schematic or unverified TPS259470 footprint.
  • Project Overview

  • Intended Use

  • What the Device Should Do

  • Main Features

  • System Architecture

  • Hardware Subsystems

  • Compute

  • USB and Serial

  • Power and Battery

  • Control, RTC, and Status

  • Interfaces and Connections

  • Power and Runtime Expectations

  • Power Tree and Power Budget

  • Manufacturing and Assembly Expectations

  • Firmware-Relevant Hardware Requirements

  • Physical Design Expectations

  • Important Design Decisions

  • Required Pre-Layout Deliverables

  • Assumptions

  • Change Notes