Scope: Electrical Rule Checks after applying REV-FINAL active schematic wiring and preserving U3/LM66100 battery-backup ideal-OR topology as an OPEN EE REVIEW ITEM. DNP blocks remain placed and electrically inactive.
Summary:
Total unresolved ERC checks: 115
Errors: 8 Missing Power
Warnings: 107 Floating Pin
Missing Power errors (8)
Power input not connected: UCMP1:VCC (net: —) — DNP TLV7011 comparator footprint.
Power input not driven: J1:VBUS (net: +5V_USB) — USB-C VBUS is an external input/source flag issue.
Power input not driven: J1:VBUS__1 (net: +5V_USB) — USB-C VBUS duplicate pin, external input/source flag issue.
Power input not connected: U_CANFD:VDD (net: —) — DNP MCP2518FD CAN-FD controller footprint.
Power input not connected: UINA2:VS (net: —) — DNP INA181 current-sense footprint.
Power input not connected: UINA1:VS (net: —) — DNP INA181 current-sense footprint.
Power input not connected: ADS1115:VDD (net: —) — DNP ADS1115 footprint.
Power input not connected: UCMP2:VCC (net: —) — DNP TLV7011 comparator footprint.
Floating Pin warnings (107)
J_FP:MP_2
J_FP:MP_1
J2:2
J10:Pin_4
J10:Pin_3
U11:BIAS
U2:FB
U2:AAM
J8:Pin_4
R12:P2
R12:P1
U12:BIAS
R11:P2
R11:P1
U1:IO35
U1:IO37
U1:IO46
U1:IO45
U1:IO48
U1:IO36
U_C6:IO19
U_C6:IO22
U_C6:IO14
U_C6:IO15
U_C6:TXD0
U_C6:IO1
U_C6:IO21
U_C6:IO23
U_C6:RXD0
U_C6:IO18
U_C6:IO20
U_C6:IO5
U_C6:IO12
U_C6:IO9
U_C6:IO8
U_C6:IO13
U13:BIAS
U20:P11
U20:P10
U20:P13
U20:P16
U20:P15
U20:P17
U20:P12
U20:P14
U10:BIAS
C14:P1
C14:P2
U7:TS
U7:VIN3
U7:PWRON
U7:ALDO3
U7:VRTC
U7:ALDO1
U7:FB4
U7:VIN2
U7:LX3
U7:DLDO1/DC1SW
U7:VIN1
U7:DLDO2/DC4SW
U7:CHGLED
U7:FB1
U7:VIN4
U7:BLDO1
U7:LX1
U7:ALDO4
U7:PWROK
U7:BLDO2
U7:FB3
U7:CPULDOS
U7:FB2
U7:ALDOIN
U7:VBACKUP
U7:VREF
U7:GPIO1/FB5/RTC/LDO2
U7:VMID
U7:LX4
U7:BLDOIN
U7:BAT
U7:LX2
U7:ALDO2
U7:EP
U7:IRQ
U7:GND
U7:SW
C13:P1
C13:P2
J_MEZZ:25
J_MEZZ:33
J_MEZZ:34
J_MEZZ:36
J_MEZZ:22
J_MEZZ:40
J_MEZZ:23
J_MEZZ:26
J_MEZZ:31
J_MEZZ:39
J_MEZZ:21
J_MEZZ:32
J_MEZZ:35
J_MEZZ:28
J_MEZZ:38
J_MEZZ:29
J_MEZZ:30
J_MEZZ:37
J_MEZZ:27
J_MEZZ:24
Notes
U3A/U3B LM66100 were not deleted and remain populated. The SYS_BACKUP_OR_OPEN_EE and AXP_SYS_SRC_OPEN_EE nets are flagged with an EE Review property for the open ideal-OR/battery-backup topology item.
The active required interfaces are present in the schematic: I2C on IO7/IO8, thermocouple SPI on IO17/18/21 with CS IO38/39/40/41 and FAULT IO42, CAN via SN65HVD230 using ESP32-S3 TXD0/RXD0 module pins representing IO43/IO44, C6 esp-hosted SPI on IO9/10/11/13 plus IO14 handshake and IO15 reset, beeper PWM on IO16, display QSPI on IO1-6/12, and USB D-/D+ on IO19/IO20.
Remaining violations are intentionally not auto-resolved where they touch DNP footprints, open connector pins, or the EE-review power topology.