I’ll reconcile the redesign against the live schematic, fix any discovered electrical or pin-mapping issues, rerun ERC, and update the ArduPilot hardware definition, power budget, and bring-up plan.
The live reconciliation is still running through the pin-capability, PMU calculation, and ERC fix loops. I’m waiting for that pass to settle before independently checking the final results.
Thought for 6 mins 13 sec
20 days ago
Awaiting 1 background task
Received notification from "Hades H753 Redesign" that it finished — picking the work back up.
The H753 redesign executor completed and the live project changed to 138 components and 107 nets, consistent with the single-MCU cleanup and PMU/interface work.
Still required
Independently reconcile the executor’s detailed report against the live schematic.
Confirm complete STM32F405 removal and validate every H753 peripheral assignment.
Verify PMU, external-shunt, TMP36, ESC-header, and camera-trigger calculations.
Run a fresh ERC fix/verify pass.
Confirm the ArduPilot hwdef, power budget, and bring-up files were correctly updated.
I cannot complete those verification steps because no ACUs are currently available. The executor’s completion should therefore be treated as unverified, not final schematic approval.
Rev-A uses a 4S LiPo: 16.8 V fully charged, 14.8 V nominal, and 12.0 V depleted operating point. The TPS26630 UVLO target is approximately 10.5 V. Conservative conversion assumptions are 90% nominal and 88% at 12 V for the 5 V buck, 86% at 10.5 V, and 90% for the 5 V-to-3.3 V buck.
The propulsion path is not included in the avionics regulator budget: J4–J7 are raw VBAT/GND ESC branches. J18 carries only signal, signal ground, and telemetry.
Rail loads
3.3 V digital rail — U5 MP2332H, 2 A rating
Table
Load
Typical
Peak / design allowance
STM32H753 at flight clock
250 mA
439 mA datasheet maximum basis
W25Q128
5 mA
25 mA program/erase
TCAN3413 VCC + VIO
5 mA
60.3 mA including active bus allowance
microSD
50 mA
200 mA transient
INA240A2 + divider/clamp overhead
2 mA
3 mA
Total
312 mA
727 mA
The removed STM32F405 and F4 expansion allocations are zero. U5 peak utilization is 36.4%, leaving 1.273 A current headroom. L2 is 470 nH with 4 A saturation rating, exceeding the MP2332H 3.5 A typical low-side current-limit envelope and the calculated load peak.
U6 dissipation is approximately 0.034 W typical and 0.102 W at the 60 mA allowance. Its fixed-output FB pin is tied directly to OUT/SENSOR_3V3 as required.
5 V rail — U4 LMR33640, 4 A rating
The 3.3 V rail reflects to 5 V as 3.3 × I3V3 / (5 × 0.90).
Table
5 V source/load
Typical
Peak allowance
Reflected 3.3 V digital rail
229 mA
533 mA
Sensor-LDO input
20 mA
60 mA
J13 external GNSS
50 mA
250 mA
J12 ExpressLRS/CRSF
100 mA
500 mA
J14 CAN auxiliary
0 mA
100 mA
J19 camera power
0 mA
500 mA
Total 5 V
399 mA
1.943 A
Power
1.995 W
9.715 W
U4 peak utilization is 48.6%, leaving 2.057 A output-current headroom. L1 is 6.8 µH with a 6.5 A saturation requirement; this exceeds the LMR33640 maximum 6.2 A high-side current limit. U4 uses the datasheet 5 V adjustable network R1 = 100 kΩ and R2 = 24.9 kΩ, four 22 µF output capacitors, 10 µF + 220 nF input capacitance, and a 100 nF bootstrap capacitor.
Battery-input reflection
Table
Condition
5 V load
Assumed efficiency
AVIONICS_VBAT current
Typical, 14.8 V
1.995 W
90%
0.150 A
Peak, 14.8 V
9.715 W
90%
0.729 A
Peak, 12.0 V
9.715 W
88%
0.920 A
Peak at 10.5 V UVLO boundary
9.715 W
86%
1.076 A
TPS26630 is set for approximately 1.84–2.16 A current limit. At the minimum 1.84 A limit and worst calculated 1.076 A demand, current margin is 0.764 A (41.5%). Connector peak allowances are not all expected continuously; firmware/integration must enforce the listed limits.
PMU scaling and external shunt
Battery voltage
R38 + R11 = 102 kΩ high side and R40 = 20 kΩ low side:
Divider ratio: 6.10 V/V.
16.8 V battery → 2.754 V ADC.
3.300 V ADC full scale → 20.13 V battery.
Divider current at 16.8 V: 137.7 µA.
C74 = 100 nF and 102k || 20k = 16.72 kΩ produce a 95.2 Hz pole.
R41 = 1 kΩ limits transient/injection current.
D3 BAT54S clamps the final BATTERY_VOLTAGE_ADC node to GND and 3V3.
Initial ArduPilot setting: BATT_VOLT_MULT = 6.10, followed by DMM calibration.
Battery current
J20 carries duplicated Kelvin sense contacts only: pins 1–2 = SHUNT+, pins 3–4 = SHUNT−. The main 80 A path and shunt are external.
Assumed shunt: 0.5 mΩ, true Kelvin construction, minimum 5 W continuous rating with installation-specific thermal margin. U13 INA240A2 gain is 50 V/V, VS = 3.3 V, common-mode operating range −4 V to 80 V, and REF1/REF2 are grounded for unidirectional output.
Sensitivity: 25 mV/A.
Inverse scale: 40.0 A/V (BATT_AMP_PERVLT).
80 A continuous: 40 mV shunt drop, 2.000 V output, 3.2 W external shunt dissipation.
100 A: 50 mV, 2.500 V, 5.0 W.
120 A short burst: 60 mV, 3.000 V, 7.2 W.
INA240 guaranteed positive linear output with 3.3 V supply is approximately 3.1 V, corresponding to about 124 A. ADC theoretical full scale is 132 A, so amplifier swing sets the practical ceiling.
R35/R10 are matched 10 Ω input resistors and C72 is 10 nF differential filtering. TI notes that 10 Ω input resistors add about 0.33% gain error, which is removed in final current calibration. R37/C73 form the output ADC filter and isolate the INA240 from excessive capacitive load.
Connector allocations
J12 CRSF: 500 mA peak maximum at 5 V.
J13 GNSS: 250 mA peak maximum at 5 V.
J14 CAN auxiliary: 100 mA peak maximum at 5 V.
J19 camera: 500 mA peak maximum at 5 V.
Combined external 5 V allowance: 1.35 A peak.
Protection and regulator audit
TPS26630 B_GATE clamp is 14 V maximum; Q1 CSD19537Q3 absolute maximum VGS is ±20 V, so the controller cannot exceed the MOSFET VGS rating.
Q1 is the TPS26630 recommended 100 V external blocking FET; Q2 BSS138 meets the controller guidance for the fast pull-down device.
U6 is the fixed 3.3 V regulator and has FB tied to OUT; no adjustable divider is used.
U4 is the adjustable LMR33640ADDA and its 100 kΩ/24.9 kΩ divider is the exact datasheet 5 V example.
U5 MP2332H is adjustable and uses 40.2 kΩ/13 kΩ for approximately 3.3 V.
L1 6.5 A saturation exceeds U4's 6.2 A maximum high-side current limit. L2 4 A saturation exceeds U5's 3.5 A typical low-side limit.
USB VBUS remains data/VBUS-sense only and is not connected to 5 V, AVIONICS_VBAT, or VBAT_RAW.
Raw four-branch 80 A PDB capability still requires PCB copper, via, connector-pad, and thermal validation during layout; this schematic does not claim an onboard 80 A shunt.