Project Completion Steps

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The project is not ready for layout/routing yet: it has 92 components placed, but 0 schematic nets, so everything is electrically unwired. The review currently shows hundreds of floating-pin warnings because no pins are connected.
To complete it, do this in order:
  1. Finish the schematic first
    • Wire all power rails: AC input, isolated/non-isolated 5 V, 3.3 V, metrology analog supplies, MCU/ESP32/LAN/RS485 rails.
    • Wire the main ICs from datasheets: STM32G431, ESP32-WROVER-E, ATM90E36A, LAN8720A, AP63203, MIC5504, SN65HVD485.
    • Add/verify all required decoupling, boot straps, pull-ups, crystals, reset circuits, Ethernet magnetics, RS485 termination/protection, and metrology input networks.
    • Mark truly unused pins as no-connect.
  2. Run ERC and fix until clean
    • The current floating-pin warnings are expected because there are no nets.
    • Do not proceed to PCB routing until ERC is clean or every warning is justified.
  3. Validate safety-critical sections
    • Check mains input, fuse/MOV/NTC/X2/Y-cap placement, creepage/clearance, isolation boundary, and HV/LV separation.
    • Verify the Class 0.5 metrology front-end resistor/capacitor values against the ATM90E36A reference design.
  4. Then continue PCB layout
    • Board already exists as 160 mm × 100 mm, 4-layer, and components are placed.
    • After schematic wiring creates nets, place/adjust components by functional block, then route.
  5. Final review/export
    • Run DRC/ERC.
    • Fix airwires, clearance, copper, footprint, and manufacturing issues.
    • Export Gerbers, BOM, pick-and-place, and assembly files.
Important: your current access is view-only, so I can inspect and advise, but I can’t directly modify this project unless you get edit access or fork/copy it into a project you can edit.
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List power nets
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Files

Schematic

Layout

Preview

Design Notes
EM-3P-ETX Rev A implementation decisions
  • Architecture: STM32G431CBT6 for metrology/UI/RS485/logging, ESP32-WROVER-E for Ethernet/WiFi/MQTT/web/OTA, ATM90E36A as the primary metrology IC.
  • Grounding: AGND, DGND, and CHASSIS GND kept separate; AGND and DGND joined at a single point near ATM90E36A.
  • Ethernet: LAN8720 RMII connected only to ESP32. STM32 is not connected to RMII.
  • Current sensing: external current-output CT interface with 20 ohm 0.1% burden, 33 ohm + 10 nF RC filter, TVS clamp, and anti-parallel BAT54 protection.
  • Voltage sensing: three-phase divider network using 820 kOhm 0.1% resistors with RC filtering and 8 mm creepage objective.
  • AC input protection: fuse, MOV 14D471K, NTC 5D-9, EMI choke, mandatory X2 0.1 uF L-N, and Y 2.2 nF L-earth.
  • Power tree: isolated AC-DC to 5 V, buck 5 V to 3.3 V, analog LDO rail for metrology analog domain.
  • Layout target: 4-layer board, Top signal / L2 GND / L3 power / Bottom signal; HV zone left, metrology center, MCU zone right, Ethernet at board edge, ESP32 antenna keepout preserved.
  • Required test points: voltage sense nodes, CT nodes, 3.3 V, 5 V, UART debug, SPI debug.

  • EM-3P-ETX Rev A implementation decisions