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J1 provides default 5 V sink input and USB 2.0 full-speed data.R1 on USB_CC1, R2 on USB_CC2.D2 TVS and IC1 TPS25210L eFuse.VBUS_PROTECTED feeds U3 AP63203 fixed 3.3 V buck regulator.3V3 powers ESP1 ESP32-C3-WROOM-02-N4 and U4 SHT41-AD1B-R2.ESP1 communicates with U4 over I2C: IO4 = I2C_SDA, IO5 = I2C_SCL.IO18 = USB_DN, IO19 = USB_DP.SW1 reset on ESP_EN, SW2 boot/download on ESP_BOOT/GPIO9.ESP1:IO6 drives D3 through R14.J1 is rated 5 A collectively on VBUS pins and 48 V DC.D1.IC1 TPS25210L provides:OVCSEL is left open for the 5.7 V clamp selection.R5 on ILM.R3/R4 on EN/UVLO.Table
| Function | Components | Value | Target |
|---|---|---|---|
| UVLO divider top | R3 | 470 kΩ | ~4 V rising threshold |
| UVLO divider bottom | R4 | 205 kΩ | Datasheet example value |
| Current limit | R5 | 953 Ω | ~3.5 A limit using RILM = 3334 / ILIM |
| PG threshold top | R6 | 100 kΩ | ~4.5 V power-good threshold |
| PG threshold bottom | R7 | 36.5 kΩ | Datasheet example value |
| dV/dt | C3 | 1 nF | ~2 V/ms slew rate |
| Overcurrent timer | C4 | 2.2 nF | ~2 ms blanking |
| Output capacitance | C2 | 10 µF | eFuse output bulk |
U3 AP63203WU-7 was selected instead of an LDO to avoid thermal loss during Wi-Fi TX peaks and to support low-power operation over 0.5 A to 3 A USB-C sources.Table
| Function | Component | Value |
|---|---|---|
| Input capacitor | C5 | 10 µF |
| Buck inductor | L1 | 3.9 µH |
| Bootstrap capacitor | C6 | 100 nF |
| Output capacitor 1 | C7 | 22 µF |
| Output capacitor 2 | C8 | 22 µF |
3V3 supply range is 3.0 V to 3.6 V; design uses 3.3 V.R9 = 10 kΩ pull-up to 3.3 V and C11 = 1 µF delay/filter capacitor to GND.SW1 pulls EN low for reset.SW2 pulls GPIO9 low for download/boot mode.R12, R13) to satisfy ESP32-C3 boot strapping for download mode.U4 SHT41 operates from 1.08 V to 3.6 V, so it is compatible with 3.3 V.C12 = 100 nF local decoupling.R10/R11 = 4.7 kΩ to 3.3 V.Table
| 3.3 V load | Typical / active | Peak / worst case | Notes |
|---|---|---|---|
| ESP32-C3 Wi-Fi TX | 82-345 mA | 345 mA | Highest datasheet active RF peak used |
| SHT41 measurement | 0.5 mA | 100 mA | 100 mA only if 200 mW heater is enabled |
| Status LED | ~1.5-2 mA | ~2 mA | 680 Ω series resistor |
| Pull-ups/dividers | <1 mA | <1 mA | I2C/boot/PG pull-ups |
| Total 3.3 V rail | ~350 mA active | ~448 mA with SHT41 heater | Below 2 A regulator limit |
ESP1 at the board edge with antenna facing outward and no copper under the antenna keepout.C9/C10 close to ESP1:3V3.C12 close to U4:VDD.IC1, C1, C2, D2, and USB-C connector close together to minimize surge/current-loop inductance.U3, L1, C5, C6, C7, and C8 tightly as a switching regulator cluster with a short SW node.Architecture
Datasheet-grounded design choices
USB-C sink input
TPS25210L eFuse input protection
AP63203 3.3 V buck regulator
ESP32-C3-WROOM-02-N4 module
SHT41 temperature/humidity sensor
Power budget
Schematic review result
Layout notes for next phase