# SPC5643LFF2MMM1R (Component)
## Description
NXP MCU
SPC5643LFF2MMM1R
BGA-257_L14.0-W14.0-P0.80-TL_NXP_MPC5643L
LCSC Part Number: C2057133
JLCPCB Part Class: Extended Part
Manufactured by NXP(恩智浦)
## Component Details
- **Owner:** lcsc
- **Created:** 3/17/2026
- **Last Updated:** 3/17/2026
- **Visibility:** Public
- **Manufacturer Name:** NXP(恩智浦)
- **JLCPCB Part Class:** Extended Part
- **Manufacturer Part Number:** SPC5643LFF2MMM1R
- **Package or Case Code:** BGA-257_L14.0-W14.0-P0.80-TL_NXP_MPC5643L
- **Part Type:** NXP MCU
- **LCSC Part Number:** C2057133
## Distributor Pricing (qty 1)
*Pricing shown for quantity 1. For price breaks and other quantities, open in Flux.*
| Distributor | Unit Price (qty 1) | Stock |
|------------|--------------------|-------|
| [Arrow](https://www.arrow.com/en/products/spc5643lff2mmm1r/nxp-semiconductors.html?utm_currency=USD®ion=nac) | N/A | N/A |
| [LCSC](https://www.lcsc.com/product-detail/C2057133.html) | $26.2278 | 0 |
| [Mouser](https://www.mouser.com/ProductDetail/NXP-Semiconductors/SPC5643LFF2MMM1R?qs=6ddF3R%2F6EV%2FmDTjscKeieA%3D%3D) | N/A | N/A |
| [Verical](https://www.verical.com/pd/nxp-semiconductors-microcontroller-SPC5643LFF2MMM1R-1764627?utm_currency=USD) | N/A | N/A |
- **Part Type:** Integrated Circuits
- **Sub-Type:** Embedded Processor
- **Manufacturer:** NXP
- **MPN:** SPC5643LFF2MMM1R
- **Mount Type:** PCB
- **Package / Case Code:** BGA
- **Pin Count:** 207
- **Logic Function:** Control Unit
## Pins
| Pin | Name | Type |
|-----|------|------|
| A3 | VDD_HV_IO | |
| A7 | D[3] | |
| A8 | C[15] | |
| A9 | VDD_HV_IO | |
| A10 | A[12] | |
| A13 | A[10] | |
| A14 | B[2] | |
| A15 | C[10] | |
| B3 | B[6] | |
| B4 | A[14] | |
| B6 | A[9] | |
| B7 | D[4] | |
| B8 | D[0] | |
| B11 | E[15] | |
| B12 | E[14] | |
| B13 | B[3] | |
| B15 | B[0] | |
| B16 | VDD_HV_IO | |
| BCTRL | R13 | |
| C1 | VDD_HV_IO | |
| C2 | NC | |
| C5 | D[2] | |
| C6 | A[13] | |
| C7 | VDD_HV_REG_2 | |
| C8 | VDD_HV_REG_2 | |
| C14 | B[1] | |
| C16 | A[4] | |
| D3 | A[15] | |
| D4 | C[6] | |
| D6 | VDD_LV_COR | |
| D8 | VDD_HV_IO | |
| D10 | NC | |
| D11 | A[11] | |
| D12 | E[13] | |
| D14 | VDD_HV_IO | |
| D16 | D[14] | |
| E[2] | U6 | |
| E[4] | U4 | |
| E[5] | T5 | |
| E[6] | R6 | |
| E[7] | T6 | |
| E[9] | T10 | |
| E3 | D[1] | |
| E14 | NC | |
| E15 | C[14] | |
| EXTAL | R1 | |
| F[0] | D7 | |
| F[3] | B5 | |
| F[4] | D2 | |
| F[5] | D1 | |
| F[6] | E2 | |
| F[7] | J1 | |
| F[8] | K2 | |
| F[9] | K1 | |
| F[10] | L1 | |
| F[11] | L2 | |
| F[12] | C17 | |
| F[13] | B14 | |
| F[14] | C13 | |
| F[15] | D13 | |
| F3 | A[7] | |
| F4 | A[8] | |
| F6 | VDD_LV_COR | |
| F7 | VDD_LV_COR | |
| F8 | VDD_LV_COR | |
| F9 | VDD_LV_COR | |
| F10 | VDD_LV_COR | |
| F11 | VDD_LV_COR | |
| F12 | VDD_LV_COR | |
| F14 | NC | |
| F15 | C[13] | |
| FCCU_F[0] | R2 | |
| FCCU_F[1] | C4 | |
| G[2] | E16 | |
| G[3] | D17 | |
| G[4] | F17 | |
| G[5] | N17 | |
| G[6] | G17 | |
| G[7] | P17 | |
| G[8] | P16 | |
| G[9] | R17 | |
| G[10] | P15 | |
| G[11] | U15 | |
| G[12] | F2 | |
| G[13] | H1 | |
| G[14] | A6 | |
| G[15] | J2 | |
| G2 | VDD_HV_IO | |
| G3 | C[5] | |
| G4 | A[6] | |
| G6 | VDD_LV_COR | |
| G14 | D[12] | |
| H[0] | A5 | |
| H[1] | F1 | |
| H[2] | A4 | |
| H[3] | G1 | |
| H[4] | L16 | |
| H[5] | M17 | |
| H[6] | H17 | |
| H[7] | K16 | |
| H[8] | K15 | |
| H[9] | G16 | |
| H[10] | A11 | |
| H[11] | C11 | |
| H[12] | B10 | |
| H[13] | G15 | |
| H[14] | A12 | |
| H[15] | J17 | |
| H3 | C[4] | |
| H4 | A[5] | |
| H6 | VDD_LV | |
| H12 | VDD_LV | |
| H15 | VDD_HV_REG_1 | |
| H16 | VDD_HV_FLA | |
| I[0] | C9 | |
| I[1] | C12 | |
| I[2] | F16 | |
| I[3] | E17 | |
| J3 | VDD_HV_REG_0 | |
| J4 | VDD_HV_REG_0 | |
| J6 | VDD_LV | |
| J12 | VDD_LV | |
| J14 | VDD_LV | |
| J15 | VDD_HV_REG_1 | |
| JCOMP | C10 | |
| K4 | C[7] | |
| K6 | VDD_LV | |
| K12 | VDD_LV | |
| K14 | NC | |
| K17 | A[3] | |
| L3 | D[9] | |
| L4 | NC | |
| L6 | VDD_LV | |
| L12 | VDD_LV | |
| L14 | NC | |
| L17 | B[4] | |
| M1 | VDD_HV_OSC | |
| M2 | VDD_HV_IO | |
| M3 | D[8] | |
| M4 | NC | |
| M6 | VDD_LV | |
| M7 | VDD_LV | |
| M8 | VDD_LV | |
| M9 | VDD_LV | |
| M10 | VDD_LV | |
| M11 | VDD_LV | |
| M12 | VDD_LV | |
| M14 | C[11] | |
| M15 | B[5] | |
| MDO0 | E1 | |
| N3 | D[5] | |
| N14 | NC | |
| N15 | C[12] | |
| N16 | A[2] | |
| NMI | E4 | |
| P3 | D[6] | |
| P7 | B[8] | |
| P8 | NC | |
| P10 | VDD_HV_IO | |
| P11 | B[14] | |
| P14 | VDD_HV_IO | |
| R4 | D[7] | |
| R5 | B[7] | |
| R7 | VDD_HV_ADR0 | |
| R8 | B[10] | |
| R9 | VDD_HV_ADR1 | |
| R10 | B[13] | |
| R11 | B[15] | |
| R12 | C[0] | |
| R14 | A[1] | |
| R16 | D[11] | |
| RDY# | K3 | |
| RESET# | P2 | |
| T2 | VDD_HV_IO | |
| T3 | NC | |
| T4 | C[1] | |
| T8 | B[11] | |
| T11 | E[10] | |
| T12 | E[12] | |
| T13 | E[0] | |
| T14 | A[0] | |
| T15 | D[10] | |
| T16 | VDD_HV_IO | |
| TCK | L15 | |
| TMS | M16 | |
| U3 | NC | |
| U5 | C[2] | |
| U7 | B[9] | |
| U8 | B[12] | |
| U9 | VDD_HV_ADV | |
| U11 | E[11] | |
| U12 | NC | |
| U13 | NC | |
| U14 | VDD_HV_PMU | |
| VDD_LV_COR | G12 | |
| VDD_LV_PLL | P4 | |
| VPP_TEST | D15 | |
| VSS_HV_ADR0 | T7 | |
| VSS_HV_ADR1 | T9 | |
| VSS_HV_ADV | U10 | |
| VSS_HV_FLA | J16 | |
| VSS_HV_IO | A1 | |
| VSS_HV_OSC | P1 | |
| VSS_LV | H7 | |
| VSS_LV_COR | D5 | |
| VSS_LV_PLL | N4 | |
| XTAL | N1 | |
---
*Generated from [https://www.flux.ai/lcsc/spc5643lff2mmm1r](https://www.flux.ai/lcsc/spc5643lff2mmm1r)*