# MPC8347VVALFB (Component) ## Description MPC8347VVALFB TBGA-672_L35.0-W35.0-P1.00-TL LCSC Part Number: C1522373 undefined Manufactured by NXP(恩智浦) ## Component Details - **Owner:** lcsc - **Created:** 3/17/2026 - **Last Updated:** 3/17/2026 - **Visibility:** Public - **Manufacturer Name:** NXP(恩智浦) - **Manufacturer Part Number:** MPC8347VVALFB - **Package or Case Code:** TBGA-672_L35.0-W35.0-P1.00-TL - **LCSC Part Number:** C1522373 ## Distributor Pricing (qty 1) *Pricing shown for quantity 1. For price breaks and other quantities, open in Flux.* | Distributor | Unit Price (qty 1) | Stock | |------------|--------------------|-------| | [LCSC](https://www.lcsc.com/product-detail/C1522373.html) | $145.2122 | 0 | | [Mouser](https://www.mouser.com/en/ProductDetail/NXP-Semiconductors/MPC8347VVALFB?qs=%252B%2FjHws8zJ4JStKTXyh1wAg%3D%3D) | N/A | N/A | | [Verical](https://www.verical.com/pd/nxp-semiconductors-microprocessor-MPC8347VVALFB-2480614?utm_currency=USD) | $93.91 | 11 | - **Manufacturer:** NXP - **MPN:** MPC8347VVALFB - **Package / Case Code:** Other - **Pin Count:** 541 ## Pins | Pin | Name | Type | |-----|------|------| | A1 | GND | | | A2 | GVDD | | | A3 | MDQ[1] | | | A7 | EC_MDC | | | A11 | TSEC1_RX_CLK | | | A17 | TSEC1_COL/GPIO2[20] | | | A19 | M66EN | | | A21 | IRQ[6]#/GPIO2[18]/CKSTOP_OUT | | | A22 | IRQ[2]#/GPIO2[14] | | | A23 | GPIO1[9]/GTM1_TIN4/GTM2_TIN3 | | | A24 | GPIO1[6]/GTM1_TIN3/GTM2_TIN4 | | | A25 | GPIO1[4]/GTM1_TGATE2#/GTM2_TGATE1# | | | A26 | MPH1_D0_ENABLEN/DR_D0_ENABLEN | | | A27 | MPH1_D3_SPEED/DR_D3_SPEED | | | A28 | MPH1_DIR_DPPULLUP/DR_XCVR_SEL_DPPULLUP | | | A29 | MPH1_PCTL0/DR_TX_VALID_PCTL0 | | | A30 | MPH0_D1_SER_TXD/DR_D9_DCHGVBUS | | | A31 | MPH0_D5_DM/DR_D13_SESS_END | | | A32 | MPH0_DIR_DPPULLUP/DR_RESET | | | A33 | MPH0_STP_SUSPEND/DR_TX_READY | | | A34 | GND | | | AA1 | SPARE1 | | | AA3 | MDQ[33] | | | AA4 | GVDD | | | AA31 | NC | | | AA32 | NC | | | AA33 | NC | | | AA34 | NC | | | AB1 | SPARE2 | | | AB3 | GVDD | | | AB4 | MDQ[36] | | | AB5 | MDQ[32] | | | AB29 | VDD | | | AB31 | NC | | | AB32 | NC | | | AB33 | NC | | | AB34 | NC | | | AC2 | MDQ[37] | | | AC4 | GVDD | | | AC5 | VDD | | | AC29 | NC | | | AC31 | NC | | | AC33 | NC | | | AC34 | NC | | | AD3 | MDQ[38] | | | AD5 | GVDD | | | AD6 | MDQ[34] | | | AD29 | VDD | | | AD30 | NC | | | AD32 | NC | | | AD33 | NC | | | AD34 | NC | | | AE1 | AVDD3 | | | AE2 | MDQ[44] | | | AE3 | MDQ[40] | | | AE4 | MDQ[35] | | | AE6 | MDQ[39] | | | AE29 | NC | | | AE30 | NC | | | AF3 | GVDD | | | AG4 | MDQ[41] | | | AG5 | GVDD | | | AG6 | MDQ[45] | | | AH2 | GVDD | | | AH5 | GVDD | | | AH6 | GVDD | | | AH32 | NC | | | AH33 | NC | | | AH34 | NC | | | AJ6 | GVDD | | | AJ7 | MDQ[56] | | | AJ9 | MDQ[59] | | | AJ10 | LSYNC_IN | | | AJ13 | AVDD4 | | | AJ15 | LAD[7] | | | AJ24 | LGPL2/LSDRAS#/LOE | | | AJ31 | NC | | | AJ32 | NC | | | AJ33 | NC | | | AJ34 | NC | | | AK2 | MDQ[47] | | | AK3 | MDQ[46] | | | AK4 | MDQ[43] | | | AK5 | MDQ[42] | | | AK6 | GVDD | | | AK8 | GVDD | | | AK9 | GVDD | | | AK15 | LAD[6] | | | AK17 | LAD[18] | | | AK23 | LWE[0]#/LSDDQM[0]/LBS[0]# | | | AK24 | LALE | | | AK26 | LCLK[1] | | | AL1 | MDQ[49] | | | AL2 | MDQ[48] | | | AL6 | GVDD | | | AL7 | MDQ[61] | | | AL9 | MDQ[62] | | | AL14 | LAD[2] | | | AL16 | LAD[12] | | | AL17 | LAD[15] | | | AL18 | LAD[20] | | | AL24 | LWE[2]#/LSDDQM[2]/LBS[2]# | | | AL25 | LGPL1/LSDWE#/cfg_reset_source1 | | | AL26 | LGPL5/cfg_clkin_div | | | AM2 | MDQ[52] | | | AM5 | MDQ[50] | | | AM8 | MDQ[58] | | | AM12 | LSYNC_OUT | | | AM13 | LAD[0] | | | AM14 | LAD[3] | | | AM15 | LAD[8] | | | AM16 | LAD[11] | | | AM17 | LAD[16] | | | AM18 | LAD[21] | | | AM25 | LWE[3]#/LSDDQM[3]/LBS[3]# | | | AM27 | LCKE | | | AM33 | NC | | | AN1 | MDQ[53] | | | AN5 | MDQ[55] | | | AN7 | MDQ[57] | | | AN8 | MDQ[63] | | | AN14 | LAD[4] | | | AN15 | LAD[9] | | | AN16 | LAD[13] | | | AN26 | LBCTL | | | AN27 | LGPL3/LSDCAS#/cfg_reset_source2 | | | AN28 | LCLK[0] | | | AN33 | MCP_OUT# | | | AP4 | MDQ[54] | | | AP5 | MDQ[51] | | | AP6 | MDQ[60] | | | AP12 | AVDD2 | | | AP13 | LAD[1] | | | AP14 | LAD[5] | | | AP15 | LAD[10] | | | AP16 | LAD[14] | | | AP17 | LAD[17] | | | AP18 | LAD[19] | | | AP26 | LWE[1]#/LSDDQM[1]/LBS[1]# | | | AP27 | LGPL0/LSDA10/cfg_reset_source0 | | | AP28 | LGPL4/LGTA#/LUPWAIT/LPBSE | | | AP29 | LCLK[2] | | | B3 | MDQ[5] | | | B11 | TSEC1_RX_DV | | | B16 | TSEC1_RXD[7]/GPIO2[22] | | | B17 | TSEC1_RX_ER/GPIO2[26] | | | B21 | IRQ[5]#/GPIO2[17] | | | B23 | GPIO1[8]/GTM1_TOUT3# | | | B24 | GPIO1[5]/GTM1_TOUT2#/GTM2_TOUT1# | | | B25 | GPIO1[2]/GTM1_TOUT1# | | | B26 | MPH1_D1_SER_TXD/DR_D1_SER_TXD | | | B27 | MPH1_D4_DP/DR_D4_DP | | | B29 | MPH1_CLK/DR_CLK | | | B30 | MPH0_D3_SPEED/DR_D11_DMMD | | | B31 | MPH0_D6_SER_RCV/DR_D14 | | | B32 | MPH0_NXT/DR_RX_ACTIVE_ID | | | B33 | MPH0_CLK/DR_RX_VALID | | | B34 | PCI_INTA#/IRQ_OUT# | | | C1 | GND | | | C2 | MDQ[6] | | | C3 | MDQ[2] | | | C4 | MDQ[4] | | | C6 | LVDD2 | | | C7 | GND | | | C8 | EC_GTX_CLK125 | | | C9 | LVDD1 | | | C10 | GND | | | C11 | GND | | | C15 | GND | | | C19 | IRQ0#/MCP_IN#/GPIO2[12] | | | C20 | IRQ[7]#/GPIO2[19]/CKSTOP_IN | | | C21 | IRQ[4]#/GPIO2[16] | | | C22 | IRQ[1]#/GPIO2[13] | | | C23 | GND | | | C25 | GND | | | C27 | MPH1_D5_DM/DR_D5_DM | | | C28 | GND | | | C29 | MPH0_D0_ENABLEN/DR_D8_CHGVBUS | | | C30 | MPH0_D4_DP/DR_D12_VBUS_VLD | | | C31 | MPH0_D7_DRVVBUS/DR_D15_IDPULLUP | | | C32 | MPH0_PWRFAULT/DR_RX_VALIDH | | | C33 | PCI_RESET_OUT# | | | C34 | PCI_GNT0# | | | CLKIN | AM9 | | | D1 | GND | | | D2 | MDQ[8] | | | D3 | MDQ[3] | | | D4 | MDQ[7] | | | D5 | MDQ[0] | | | D8 | GND | | | D9 | LVDD2 | | | D10 | TSEC1_GTX_CLK | | | D11 | LVDD1 | | | D16 | TSEC1_RXD[6]/GPIO2[23] | | | D20 | GND | | | D21 | IRQ[3]#/GPIO2[15] | | | D23 | GPIO1[7]/GTM1_TGATE3#/GTM2_TGATE4# | | | D24 | GPIO1[3]/GTM1_TIN2/GTM2_TIN1 | | | D25 | MPH1_D2_VMO_SE0/DR_D2_VMO_SE0 | | | D26 | MPH1_D6_SER_RCV/DR_D6_SER_RCV | | | D27 | MPH1_NXT/DR_SESS_VLD_NXT | | | D28 | MPH1_PCTL1/DR_TX_VALIDH_PCTL1 | | | D30 | GND | | | D31 | MPH0_PCTL0/DR_LINE_STATE0 | | | D32 | PCI_REQ[0]# | | | D33 | PCI_GNT1#/CPCI1_HS_LED | | | D34 | PCI_REQ[1]#/CPCI1_HS_ES | | | E2 | GVDD | | | E4 | MDQ[12] | | | E5 | MDQ[9] | | | E7 | GND | | | E9 | EC_MDIO | | | E13 | GND | | | E15 | GND | | | E17 | GND | | | E18 | GND | | | E19 | VDD | | | E21 | GND | | | E22 | GPIO1[11]/GTM1_TOUT4#/GTM2_TOUT3# | | | E23 | GND | | | E24 | GPIO1[1]/GTM1_TGATE1#/GTM2_TGATE2# | | | E25 | GND | | | E26 | MPH1_D7_DRVVBUS/DR_D7_DRVVBUS | | | E27 | MPH1_PWRFAULT/DR_RX_ERROR_PWRFAULT | | | E28 | MPH0_D2_VMO_SE0/DR_D10_DPPD | | | E29 | VDD | | | E30 | MPH0_PCTL1/DR_LINE_STATE1 | | | E32 | GND | | | E33 | PCI_GNT2#/CPCI1_HS_ENUM | | | E34 | PCI_REQ[2]# | | | F3 | MDQ[13] | | | F6 | GND | | | F7 | VDD | | | F9 | VDD | | | F11 | VDD | | | F12 | TSEC1_CRS/GPIO2[21] | | | F13 | VDD | | | F15 | VDD | | | F17 | VDD | | | F18 | VDD | | | F19 | GND | | | F21 | VDD | | | F22 | GPIO1[10]/GTM1_TGATE4#/GTM2_TGATE3# | | | F23 | VDD | | | F24 | GPIO1[0]/GTM1_TIN1/GTM2_TIN2 | | | F25 | VDD | | | F26 | MPH1_STP_SUSPEND/DR_STP_SUSPEND | | | F27 | GND | | | F29 | VDD | | | F30 | GND | | | F31 | PCI_GNT[3]# | | | F32 | PCI_REQ[1]# | | | F33 | PCI_GNT[4]# | | | F34 | GND | | | G2 | MDQ[10] | | | G3 | MDQ[15] | | | G4 | MDQ[14] | | | G5 | GVDD | | | G6 | GVDD | | | G29 | PCI_REQ[0]# | | | G30 | PCI_AD[31] | | | G31 | GND | | | G32 | PCI_AD[30] | | | G34 | PCI_AD[29] | | | GND | U29 | | | H1 | MDQ[16] | | | H2 | MDQ[20] | | | H5 | GND | | | H6 | MDQ[11] | | | H29 | VDD | | | H31 | PCI_AD[28] | | | H32 | PCI_AD[27] | | | H33 | PCI_AD[26] | | | H34 | PCI_AD[25] | | | HRESET# | B18 | | | IIC1_SCL | AP32 | | | IIC1_SDA | AK29 | | | IIC2_SCL | AM31 | | | IIC2_SDA | AN31 | | | J2 | MDQ[17] | | | J4 | GND | | | J5 | GVDD | | | J6 | VDD | | | J29 | PCI_AD[24] | | | J30 | PCI_C/BE#[3] | | | J31 | PCI_IDSEL | | | J32 | PCI_AD[23] | | | J33 | PCI_AD[22] | | | J34 | GND | | | K4 | GVDD | | | K5 | GVDD | | | K6 | MDQ[21] | | | K29 | VDD | | | K30 | GND | | | K31 | PCI_AD[20] | | | K33 | PCI_AD[19] | | | K34 | PCI_AD[18] | | | L2 | MDQ[22] | | | L4 | GVDD | | | L5 | GND | | | L6 | MDQ[18] | | | L30 | PCI_AD[21] | | | L31 | AVDD1 | | | L33 | PCI_AD[17] | | | L34 | PCI_AD[16] | | | LA[27] | AK21 | | | LA[28] | AP23 | | | LA[29] | AN23 | | | LA[30] | AP24 | | | LA[31] | AK22 | | | LAD[22] | AN18 | | | LAD[23] | AP19 | | | LAD[24] | AN19 | | | LAD[25] | AM19 | | | LAD[26] | AP20 | | | LAD[27] | AK19 | | | LAD[28] | AN20 | | | LAD[29] | AL20 | | | LAD[30] | AP21 | | | LAD[31] | AN21 | | | LCS[0]# | AN24 | | | LCS[1]# | AL23 | | | LCS[2]# | AP25 | | | LCS[3]# | AN25 | | | LDP[0]/CKSTOP_OUT# | AM21 | | | LDP[1]/CKSTOP_IN# | AP22 | | | LDP[2] | AN22 | | | LDP[3] | AM22 | | | M2 | GND | | | M4 | MDQ[23] | | | M5 | GND | | | M6 | MDQ[19] | | | M29 | VDD | | | M30 | GND | | | M31 | PCI_C/BE#[2] | | | M32 | PCI_FRAME# | | | M33 | GND | | | M34 | PCI_IRDY# | | | MA[0] | W1 | | | MA[1] | U4 | | | MA[2] | T3 | | | MA[3] | R3 | | | MA[4] | P1 | | | MA[5] | M1 | | | MA[6] | N1 | | | MA[7] | L3 | | | MA[8] | L1 | | | MA[9] | K2 | | | MA[10] | Y2 | | | MA[11] | K3 | | | MA[12] | J3 | | | MA[13] | AP2 | | | MA[14] | AN6 | | | MBA[0] | AD1 | | | MBA[1] | AA5 | | | MBA[2] | H4 | | | MCAS# | AG3 | | | MCK[0] | U2 | | | MCK[0]# | U3 | | | MCK[1] | F4 | | | MCK[1]# | E3 | | | MCK[2] | AM3 | | | MCK[2]# | AN2 | | | MCK[3] | V3 | | | MCK[3]# | V4 | | | MCK[4] | F2 | | | MCK[4]# | E1 | | | MCK[5] | AN3 | | | MCK[5]# | AM4 | | | MCKE[0] | H3 | | | MCKE[1] | G1 | | | MCS[0]# | AG2 | | | MCS[1]# | AG1 | | | MCS[2]# | AK1 | | | MCS[3]# | AL4 | | | MDM[0] | B1 | | | MDM[1] | F1 | | | MDM[2] | K1 | | | MDM[3] | R4 | | | MDM[4] | AD4 | | | MDM[5] | AJ1 | | | MDM[6] | AP3 | | | MDM[7] | AP7 | | | MDM[8] | Y4 | | | MDQS[0] | B2 | | | MDQS[1] | F5 | | | MDQS[2] | J1 | | | MDQS[3] | P2 | | | MDQS[4] | AC1 | | | MDQS[5] | AJ2 | | | MDQS[6] | AN4 | | | MDQS[7] | AL8 | | | MDQS[8] | W2 | | | MECC[2]/MSRCID[2] | Y3 | | | MECC[3]/MSRCID[3] | AA6 | | | MECC[4]/MSRCID[4] | T1 | | | MECC[5]/MDVAL | U1 | | | MECC[6] | Y1 | | | MECC[7] | Y6 | | | MODT[0] | AH3 | | | MODT[1] | AJ5 | | | MODT[2] | AH1 | | | MODT[3] | AJ4 | | | MRAS# | AF4 | | | MVREF1 | M3 | | | MVREF2 | AD2 | | | MWE# | AF1 | | | N2 | MDQ[24] | | | N3 | GND | | | N4 | GVDD | | | N5 | GND | | | N6 | VDD | | | N29 | PCI_TRDY# | | | N30 | PCI_DEVSEL# | | | N31 | PCI_STOP# | | | N33 | PCI_PERR# | | | N34 | PCI_SERR# | | | NC | AK32 | | | OVDD | B22 | | | P3 | MDQ[29] | | | P4 | MDQ[25] | | | P5 | GVDD | | | P6 | MDQ[28] | | | P29 | VDD | | | P30 | GND | | | P32 | PCI_PAR | | | P33 | PCI_C/BE#[1] | | | P34 | PCI_AD[15] | | | PCI_CLK_OUT[0] | AN9 | | | PCI_CLK_OUT[1] | AP9 | | | PCI_CLK_OUT[2] | AM10 | | | PCI_CLK_OUT[3] | AN10 | | | PCI_CLK_OUT[4] | AJ11 | | | PCI_SYNC_IN/PCI_CLOCK | AK12 | | | PCI_SYNC_OUT | AP11 | | | PORESET# | C18 | | | QUIESCE# | A18 | | | R1 | MDQ[30] | | | R2 | MDQ[26] | | | R5 | GND | | | R6 | GVDD | | | R29 | PCI_AD[14] | | | R30 | PCI_AD[13] | | | R32 | GND | | | R33 | PCI_AD[12] | | | R34 | PCI_AD[11] | | | RTC/PIT_CLOCK | AM32 | | | SPICLK | AK30 | | | SPIMISO | AP33 | | | SPIMOSI | AN32 | | | SPISEL | AL31 | | | SRESET# | D18 | | | T2 | MDQ[31] | | | T4 | MDQ[27] | | | T5 | GND | | | T6 | GVDD | | | T29 | VDD | | | T30 | GND | | | T31 | PCI_AD[10] | | | T32 | PCI_AD[9] | | | T33 | PCI_AD[8] | | | T34 | PCI_C/BE#[0] | | | TCK | E20 | | | TDI | F20 | | | TDO | B20 | | | TEST | D22 | | | TEST_SEL | AL13 | | | THERM0 | K32 | | | TMS | A20 | | | TRST# | B19 | | | TSEC1_RXD[0] | B8 | | | TSEC1_RXD[1] | F10 | | | TSEC1_RXD[2] | A8 | | | TSEC1_RXD[3] | E10 | | | TSEC1_RXD[4]/GPIO2[25] | F16 | | | TSEC1_RXD[5]/GPIO2[24] | E16 | | | TSEC1_TX_CLK | D17 | | | TSEC1_TX_EN | B9 | | | TSEC1_TX_ER/GPIO2[31] | A16 | | | TSEC1_TXD[0] | A9 | | | TSEC1_TXD[1] | B10 | | | TSEC1_TXD[2] | E11 | | | TSEC1_TXD[3] | A10 | | | TSEC1_TXD[4]/GPIO2[30] | B14 | | | TSEC1_TXD[5]/GPIO2[29] | A14 | | | TSEC1_TXD[6]/GPIO2[28] | B15 | | | TSEC1_TXD[7]/GPIO2[27] | A15 | | | TSEC2_COL/GPIO1[21] | C14 | | | TSEC2_CRS/GPIO1[22] | D6 | | | TSEC2_GTX_CLK | A4 | | | TSEC2_RX_CLK | B4 | | | TSEC2_RX_DV/GPIO1[23] | E6 | | | TSEC2_RX_ER/GPIO1[25] | D14 | | | TSEC2_RXD[0]/GPIO1[16] | B7 | | | TSEC2_RXD[1]/GPIO1[15] | E8 | | | TSEC2_RXD[2]/GPIO1[14] | A6 | | | TSEC2_RXD[3]/GPIO1[13] | D7 | | | TSEC2_RXD[4]/GPIO1[29] | A12 | | | TSEC2_RXD[5]/GPIO1[28] | C13 | | | TSEC2_RXD[6]/GPIO1[27] | B13 | | | TSEC2_RXD[7]/GPIO1[26] | A13 | | | TSEC2_TX_CLK/GPIO1[30] | E14 | | | TSEC2_TX_EN/GPIO1[12] | C5 | | | TSEC2_TX_ER/GPIO1[24] | F14 | | | TSEC2_TXD[0]/GPIO1[20] | B6 | | | TSEC2_TXD[1]/GPIO1[19] | F8 | | | TSEC2_TXD[2]/GPIO1[18] | A5 | | | TSEC2_TXD[3]/GPIO1[17] | B5 | | | TSEC2_TXD[4]/DR_UTMI_OPMODE0 | E12 | | | TSEC2_TXD[5]/DR_UTMI_OPMODE1 | D12 | | | TSEC2_TXD[6]/DR_XCVR_TERM_SEL | C12 | | | TSEC2_TXD[7]/GPIO1[31] | B12 | | | U5 | GVDD | | | U6 | GND | | | U30 | VDD | | | U31 | PCI_AD[7] | | | U34 | PCI_AD[6] | | | UART_CTS[1]#/MSRCID4/LSRCID4 | AP30 | | | UART_CTS[2]#/MDVAL/LDVAL | AN30 | | | UART_RTS[1]# | AP31 | | | UART_RTS[2]# | AM30 | | | UART_SIN[1]/MSRCID[2:3]/LSRCID[2] | AL28 | | | UART_SIN[2]/MSRCID[2:3]/LSRCID[3] | AM29 | | | UART_SOUT[1]/MSRCID[0:1]/LSRCID[0] | AK27 | | | UART_SOUT[2]/MSRCID[0:1]/LSRCID[1] | AN29 | | | V1 | GVDD | | | V6 | VDD | | | V29 | VDD | | | V31 | PCI_AD[5] | | | V32 | PCI_AD[4] | | | V33 | PCI_AD[3] | | | V34 | PCI_AD[2] | | | VDD | AF6 | | | W3 | MECC[1]/MSRCID[1] | | | W4 | MECC[0]/MSRCID[0] | | | W5 | GVDD | | | W29 | VDD | | | W32 | NC | | | W33 | PCI_AD[1] | | | W34 | PCI_AD[0] | | | Y5 | GVDD | | --- *Generated from [https://www.flux.ai/lcsc/mpc8347vvalfb~gros](https://www.flux.ai/lcsc/mpc8347vvalfb~gros)*