# MPC8306VMAFDCA (Component) ## Description Microcontroller Units (MCUs/MPUs/SOCs) MPC8306VMAFDCA PBGA-369_L19.0-W19.0-P0.80-TL_NXP_MPC8606S LCSC Part Number: C3225769 undefined Manufactured by NXP(恩智浦) ## Component Details - **Owner:** lcsc - **Created:** 3/17/2026 - **Last Updated:** 3/17/2026 - **Visibility:** Public - **Manufacturer Part Number:** MPC8306VMAFDCA - **Package or Case Code:** PBGA-369_L19.0-W19.0-P0.80-TL_NXP_MPC8606S - **Manufacturer Name:** NXP(恩智浦) - **Part Type:** Microcontroller Units (MCUs/MPUs/SOCs) - **LCSC Part Number:** C3225769 ## Distributor Pricing (qty 1) *Pricing shown for quantity 1. For price breaks and other quantities, open in Flux.* | Distributor | Unit Price (qty 1) | Stock | |------------|--------------------|-------| | [LCSC](https://www.lcsc.com/product-detail/C3225769.html) | $43.4193 | 0 | | [Mouser](https://www.mouser.com/en/ProductDetail/NXP-Semiconductors/MPC8306VMAFDCA?qs=EO9n970mpBBQH8z0xt7Y2A%3D%3D) | N/A | N/A | - **Part Type:** Integrated Circuits - **Sub-Type:** Logic - **Manufacturer:** NXP - **MPN:** MPC8306VMAFDCA - **Package / Case Code:** PBGA - **Pin Count:** 290 - **Logic Function:** AND ## Pins | Pin | Name | Type | |-----|------|------| | A1 | VSS | | | A2 | QUIESCE_B | | | A3 | TCK | | | A4 | TMS | | | A5 | TEST_MODE | | | A6 | LAD[2] | | | A7 | LAD[4] | | | A8 | LAD[5] | | | A9 | LAD[6] | | | A10 | LAD[9] | | | A11 | LAD[13] | | | A12 | LAD[14] | | | A13 | LA[16] | | | A14 | LA[18] | | | A15 | LA[19] | | | A16 | LA[20] | | | A17 | LA[22] | | | A18 | LA[24] | | | A19 | LCS_B[0] | | | A20 | LCS_B[2] | | | A21 | LCS_B[3] | | | A22 | LBCTL | | | A23 | NC | | | AA1 | MEMC_MDQ[4] | | | AA23 | HDLC2_RXCLK/GPIO[17]/TDM2_RCK/QE_BRG[8] | | | AB1 | MEMC_MDQ[3] | | | AB2 | MEMC_MDM[0] | | | AB3 | USBDR_PCTL[0]/UART2_SOUT[1]/LB_POR_CFG_BOOT_ECC | | | AB5 | USBDR_TXDRXD[4]/GPIO[34]/QE_BRG[3] | | | AB7 | USBDR_TXDRXD[0]/UART1_SOUT[1]/GPIO[32] | | | AB8 | USBDR_TXDRXD[1]/UART1_SIN[1]/GPIO[33] | | | AB10 | FEC2_RXD3/GPIO[40] | | | AB11 | FEC2_RXD1/GPIO[38] | | | AB13 | FEC2_CRS/GPIO[33] | | | AB14 | FEC1_TXD3/GPIO[31] | | | AB16 | FEC1_TXD0/GTM1_TOUT[1]_B/GPIO[28] | | | AB17 | FEC1_RXD3/GPIO[24] | | | AB19 | FEC1_RX_ER/GTM1_TGATE[2]_B/GPIO[20] | | | AB20 | FEC1_COL/GTM1_TIN[1]/GPIO[16] | | | AB22 | HDLC1_RTS_B/GPIO[6]/TDM1_STROBE_B/CFG_RESET_SOURCE[1] | | | AB23 | HDLC2_TXCLK/GPIO[16]/TDM2_TCK/QE_BRG[7] | | | AC2 | USBDR_NXT/UART2_SIN[1]/QE_EXT_REQ_4 | | | AC3 | USBDR_DIR/IIC_SCL2 | | | AC4 | USBDR_PWRFAULT/IIC_SDA2/CE_PIO_1 | | | AC5 | USBDR_TXDRXD[3]/UART1_SIN[2]/UART1_CTS_B1/QE_BRG[2] | | | AC6 | USBDR_TXDRXD[2]/UART1_SOUT[2]/UART1_RTS_B1/QE_BRG[1] | | | AC7 | FEC2_TXD2/GPIO[46] | | | AC8 | FEC2_TXD0/GPIO[44] | | | AC9 | FEC2_TX_ER/GPIO[43] | | | AC10 | FEC2_TX_EN/GPIO[42] | | | AC11 | FEC2_RXD2/GPIO[39] | | | AC12 | FEC2_RXD0/GPIO[37] | | | AC13 | FEC2_RX_DV/GPIO[35] | | | AC14 | FEC2_COL/GPIO[32] | | | AC15 | FEC1_TXD2/GTM1_TOUT[3]_B/GPIO[30] | | | AC16 | FEC1_TXD1/GTM1_TOUT[2]_B/GPIO[29] | | | AC17 | FEC1_TX_ER/GTM1_TOUT[4]_B/GPIO[27] | | | AC18 | FEC1_RXD2/GTM1_TGATE[3]_B/GPIO[23] | | | AC19 | FEC1_RXD1/GTM1_TIN[3]/GPIO[22] | | | AC20 | FEC1_RXD0/GPIO[21] | | | AC21 | FEC1_CRS/GTM1_TGATE1_B/GPIO[17] | | | AC22 | HDLC1_TXCLK/GPIO[0]/TDM1_TCK/QE_BRG[5] | | | B1 | GPIO[5]/TXCAN3/SD_DAT1/MDVAL(DDRID) | | | B2 | GPIO[7]/TXCAN4/SD_DAT3/QE_EXT_REQ_1 | | | B3 | GPIO[6]/RXCAN4/SD_DAT2/QE_EXT_REQ_3 | | | B4 | VSS | | | B5 | TDI | | | B6 | VSS | | | B7 | LAD[0] | | | B8 | LAD[3] | | | B9 | VSS | | | B10 | LAD[8] | | | B11 | LAD[10] | | | B12 | VSS | | | B13 | LAD[15] | | | B14 | LA[17] | | | B15 | VSS | | | B16 | LA[21] | | | B17 | LA[23] | | | B18 | VSS | | | B19 | LA[25] | | | B20 | LCS_B[1] | | | B21 | VSS | | | B22 | LGPL[0]/LFCLE | | | B23 | LALE | | | C1 | GPIO[4]/RXCAN3/SD_DAT0/MSRCID4(DDRID) | | | C2 | GPIO[3]/TXCAN2/SD_WP/MSRCID3(DDRID) | | | C22 | VSS | | | C23 | UART1_SOUT[1]/LSRCID4/LCS_B[4] | | | D1 | MEMC_MDQ[15] | | | D2 | VSS | | | D4 | GPIO[2]/RXCAN2/SD_CD/MSRCID2(DDRID) | | | D5 | VSS | | | D6 | THERM0 | | | D7 | TDO | | | D8 | TRST_B | | | D9 | LAD[1] | | | D10 | LAD[7] | | | D11 | LAD[12] | | | D12 | LAD[11] | | | D13 | LCLK[0] | | | D14 | LWE_B[1]/LBS_B[1] | | | D15 | LWE_B[0]/LFWE_B[0]/LBS_B[0] | | | D16 | LGPL[1]/LFALE | | | D17 | LGPL[3]/LFWP_B | | | D18 | VSS | | | D19 | LGPL[2]/LOE_B/LFRE_B | | | D20 | VSS | | | D22 | UART1_SIN[2]/UART1_CTS_B[1]/LCS_B[7] | | | D23 | UART1_SOUT[2]/UART1_RTS_B1/LCS_B[6] | | | E1 | MEMC_MDQ[12] | | | E2 | MEMC_MDQ[11] | | | E4 | MEMC_MDQ[13] | | | E5 | GPIO[0]/RXCAN1/SD_CLK/MSRCID0(DDRID) | | | E6 | GPIO[1]/TXCAN1/SD_CMD/MSRCID1(DDRID) | | | E7 | OVDD | | | E8 | OVDD | | | E9 | OVDD | | | E10 | OVDD | | | E11 | OVDD | | | E12 | OVDD | | | E13 | OVDD | | | E14 | OVDD | | | E15 | OVDD | | | E16 | OVDD | | | E17 | OVDD | | | E18 | LGPL[4]/LGTA_B/LUPWAIT/LFRB_B | | | E19 | LGPL[5] | | | E20 | IRQ_B0_MCP_IN_B/CE_PI_0 | | | E22 | IRQ_B2/CKSTOP_OUT_B | | | E23 | IRQ_B1/MCP_OUT_B | | | F1 | MEMC_MDQ[10] | | | F2 | VSS | | | F4 | MEMC_MDQ[14] | | | F5 | MEMC_MDQS[1] | | | F19 | UART1_SIN[1]/LDVAL/LCS_B[5] | | | F20 | IRQ_B3/CKSTOP_IN_B | | | F22 | VSS | | | F23 | SPISEL_BOOT/IIC_SDA2/CKSTOP_OUT_B | | | G1 | MEMC_MDQ[9] | | | G2 | MEMC_MDQ[8] | | | G4 | MEMC_MDM[1] | | | G5 | GVDD | | | G19 | OVDD | | | G20 | IIC_SDA1 | | | G22 | SPIMOSI/LSRCID[2] | | | G23 | SPICLK/LSRCID[0] | | | H1 | MEMC_MCS_B[1] | | | H2 | MEMC_MODT[0] | | | H4 | MEMC_MODT[1] | | | H5 | GVDD | | | H19 | OVDD | | | H20 | LCLK1/IIC_SCL2/CKSTOP_IN_B | | | H22 | SPISEL/LSRCID[1] | | | H23 | FEC_MDC | | | J1 | MEMC_MCAS_B | | | J2 | VSS | | | J4 | MEMC_MCS_B[0] | | | J5 | GVDD | | | J9 | VSS | | | J10 | VSS | | | J11 | VSS | | | J12 | VSS | | | J13 | VSS | | | J14 | VSS | | | J15 | VSS | | | J19 | OVDD | | | J20 | IIC_SCL1 | | | J22 | VSS | | | J23 | FEC3_COL/GPIO[48] | | | K1 | MEMC_MWE_B | | | K2 | MEMC_MRAS_B | | | K4 | VSS | | | K5 | GVDD | | | K9 | VSS | | | K10 | VSS | | | K11 | VSS | | | K12 | VSS | | | K13 | VSS | | | K14 | VSS | | | K15 | VSS | | | K19 | OVDD | | | K20 | SPIMISO/LSRCID[3] | | | K22 | FEC3_RX_DV/GPIO[51] | | | K23 | FEC3_CRS/GPIO[49] | | | L1 | MEMC_MBA[1] | | | L2 | MEMC_MBA[0] | | | L4 | MEMC_MA[10] | | | L5 | GVDD | | | L8 | MEMC_MVREF | | | L9 | VSS | | | L10 | VSS | | | L11 | VSS | | | L12 | VSS | | | L13 | VSS | | | L14 | VSS | | | L15 | VSS | | | L16 | AVDD1 | | | L19 | OVDD | | | L20 | FEC_MDIO | | | L22 | FEC3_RX_ER/GPIO[52] | | | L23 | FEC3_RXD0/GPIO[53] | | | M1 | MEMC_MA[0] | | | M2 | VSS | | | M4 | MEMC_MA[1] | | | M5 | GVDD | | | M9 | VSS | | | M10 | VSS | | | M11 | VSS | | | M12 | VSS | | | M16 | AVDD2 | | | M19 | OVDD | | | M20 | FEC3_RX_CLK/GPIO[50] | | | M23 | FEC3_RXD1GPIO[54] | | | N1 | MEMC_MA[2] | | | N2 | MEMC_MA[3] | | | N4 | MEMC_MA[5] | | | N5 | GVDD | | | N8 | AVDD3 | | | N19 | OVDD | | | N20 | FEC3_TX_CLK/FEC_TMR_CLK/GPIO[57] | | | N22 | FEC3_RXD2/FEC_TMR_TRIG1/GPIO[55] | | | N23 | FEC3_RXD3/FEC_TMR_TRIG2/GPIO[56] | | | OVDD | W17 | | | P1 | MEMC_MA[4] | | | P2 | MEMC_MA[6] | | | P4 | MEMC_MA[9] | | | P5 | GVDD | | | P19 | OVDD | | | P20 | FEC3_TX_EN/FEC_TMR_GCLK/GPIO[58] | | | P22 | FEC3_TX_ER/FEC_TMR_PP1/GPIO[59] | | | P23 | QE_CLK_IN | | | R1 | MEMC_MA[7] | | | R4 | MEMC_MBA[2] | | | R5 | GVDD | | | R19 | OVDD | | | R20 | FEC3_TXD0/FEC_TMR_PP2/GPIO[60] | | | R23 | SYS_CLK_IN | | | T1 | MEMC_MA[8] | | | T2 | MEMC_MA[11] | | | T5 | GVDD | | | T19 | OVDD | | | T20 | FEC3_TXD3/FEC_TMR_ALARM2/GPIO[63] | | | T22 | FEC3_TXD1/FEC_TMR_PP3/GPIO[61] | | | T23 | FEC3_TXD2/FEC_TMR_ALARM1/GPIO[62] | | | U1 | MEMC_MA[12] | | | U2 | MEMC_MA[13] | | | U4 | MEMC_MCKE[0] | | | U5 | GVDD | | | U19 | OVDD | | | U20 | HRESET_B | | | U22 | HDLC1_RXD/TDM1_RD/GPIO[3] | | | U23 | HDLC1_RXCLK/TDM1_RCK/GPIO[1] | | | V1 | MEMC_MCK[0] | | | V4 | MEMC_MDQ[1] | | | V5 | MEMC_MDQS[0] | | | V20 | PORESET_B | | | V23 | RTC_PIT_CLOCK | | | VDD | T16 | | | VSS | AC23 | | | W1 | MEMC_MCK_B[0] | | | W2 | MEMC_MDQ[7] | | | W5 | MEMC_MDQ[0] | | | W6 | USBDR_STP/QE_EXT_REQ_2 | | | W7 | OVDD | | | W18 | HDLC1_TXD/GPIO[2]/TDM1_TD/CFG_RESET_SOURCE[0] | | | W19 | HDLC1_CD_B/GPIO[4]/TDM1_TFS | | | W20 | HDLC2_TXD/GPIO[18]/TDM2_TD/CFG_RESET_SOURCE[2] | | | W22 | HDLC2_RTS_B/GPIO[22]/TDM2_STROBE_B/CFG_RESET_SOURCE[3] | | | W23 | HDLC2_CTS_B/GPIO[21]/TDM2_RFS | | | Y1 | MEMC_MDQ[6] | | | Y2 | MEMC_MDQ[5] | | | Y4 | MEMC_MDQ[2] | | | Y5 | USBDR_TXDRXD[7]/GPIO[37]/QE_BRG[11] | | | Y6 | USBDR_TXDRXD[6]/GPIO[36]/QE_BRG[9] | | | Y7 | USBDR_TXDRXD[5]/GPIO[35]/QE_BRG[4] | | | Y8 | USBDR_PCTL[1]/UART2_SOUT[2]/UART2_RTS_B1/LB_POR_BOOT_ERR | | | Y9 | USBDR_CLK/UART2_SIN[2]/UART2_CTS_B[1] | | | Y10 | FEC2_TXD3/GPIO[47] | | | Y11 | FEC2_TXD1/GPIO[45] | | | Y12 | FEC2_TX_CLK/GPIO[41] | | | Y13 | FEC2_RX_ER/GPIO[36] | | | Y14 | FEC2_RX_CLK/GPIO[34] | | | Y15 | FEC1_TX_CLK/GTM1_TIN4/GPIO[25] | | | Y16 | FEC1_TX_EN/GTM1_TGATE[4]_B/GPIO[26] | | | Y17 | FEC1_RX_CLK/GPIO[18] | | | Y18 | FEC1_RX_DV/GTM1_TIN[2]/GPIO[19] | | | Y20 | HDLC1_CTS_B/GPIO[5]/TDM1_RFS | | | Y22 | HDLC2_CD_B/GPIO[20]/TDM2_TFS | | | Y23 | HDLC2_RXD/GPIO[19]/TDM2_RD | | --- *Generated from [https://www.flux.ai/lcsc/mpc8306vmafdca~ci2a](https://www.flux.ai/lcsc/mpc8306vmafdca~ci2a)*